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mt76: mt7915: add debugfs knob for RF registers read/write
Add RF registers read/write support for debugging RF issues, which should be processed by mcu commands. The index of rf registers use the generic regidx, and are combined with two parts: WF selection [31:28] and offset [27:0]. Reviewed-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Peter Chiu <chui-hao.chiu@mediatek.com> Signed-off-by: Shayne Chen <shayne.chen@mediatek.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>
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@ -867,6 +867,36 @@ mt7915_twt_stats(struct seq_file *s, void *data)
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return 0;
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return 0;
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}
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}
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/* The index of RF registers use the generic regidx, combined with two parts:
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* WF selection [31:28] and offset [27:0].
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*/
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static int
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mt7915_rf_regval_get(void *data, u64 *val)
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{
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struct mt7915_dev *dev = data;
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u32 regval;
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int ret;
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ret = mt7915_mcu_rf_regval(dev, dev->mt76.debugfs_reg, ®val, false);
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if (ret)
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return ret;
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*val = le32_to_cpu(regval);
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return 0;
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}
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static int
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mt7915_rf_regval_set(void *data, u64 val)
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{
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struct mt7915_dev *dev = data;
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return mt7915_mcu_rf_regval(dev, dev->mt76.debugfs_reg, (u32 *)&val, true);
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}
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DEFINE_DEBUGFS_ATTRIBUTE(fops_rf_regval, mt7915_rf_regval_get,
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mt7915_rf_regval_set, "0x%08llx\n");
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int mt7915_init_debugfs(struct mt7915_phy *phy)
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int mt7915_init_debugfs(struct mt7915_phy *phy)
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{
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{
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struct mt7915_dev *dev = phy->dev;
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struct mt7915_dev *dev = phy->dev;
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@ -898,6 +928,8 @@ int mt7915_init_debugfs(struct mt7915_phy *phy)
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debugfs_create_devm_seqfile(dev->mt76.dev, "twt_stats", dir,
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debugfs_create_devm_seqfile(dev->mt76.dev, "twt_stats", dir,
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mt7915_twt_stats);
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mt7915_twt_stats);
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debugfs_create_file("ser_trigger", 0200, dir, dev, &fops_ser_trigger);
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debugfs_create_file("ser_trigger", 0200, dir, dev, &fops_ser_trigger);
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debugfs_create_file("rf_regval", 0600, dir, dev, &fops_rf_regval);
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if (!dev->dbdc_support || phy->band_idx) {
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if (!dev->dbdc_support || phy->band_idx) {
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debugfs_create_u32("dfs_hw_pattern", 0400, dir,
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debugfs_create_u32("dfs_hw_pattern", 0400, dir,
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&dev->hw_pattern);
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&dev->hw_pattern);
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@ -3661,3 +3661,32 @@ int mt7915_mcu_twt_agrt_update(struct mt7915_dev *dev,
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return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TWT_AGRT_UPDATE),
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return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TWT_AGRT_UPDATE),
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&req, sizeof(req), true);
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&req, sizeof(req), true);
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}
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}
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int mt7915_mcu_rf_regval(struct mt7915_dev *dev, u32 regidx, u32 *val, bool set)
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{
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struct {
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__le32 idx;
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__le32 ofs;
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__le32 data;
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} __packed req = {
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.idx = cpu_to_le32(u32_get_bits(regidx, GENMASK(31, 28))),
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.ofs = cpu_to_le32(u32_get_bits(regidx, GENMASK(27, 0))),
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.data = set ? cpu_to_le32(*val) : 0,
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};
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struct sk_buff *skb;
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int ret;
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if (set)
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return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RF_REG_ACCESS),
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&req, sizeof(req), false);
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ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_QUERY(RF_REG_ACCESS),
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&req, sizeof(req), true, &skb);
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if (ret)
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return ret;
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*val = le32_to_cpu(*(__le32 *)(skb->data + 8));
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dev_kfree_skb(skb);
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return 0;
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}
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@ -506,6 +506,7 @@ int mt7915_mcu_get_rx_rate(struct mt7915_phy *phy, struct ieee80211_vif *vif,
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struct ieee80211_sta *sta, struct rate_info *rate);
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struct ieee80211_sta *sta, struct rate_info *rate);
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int mt7915_mcu_rdd_background_enable(struct mt7915_phy *phy,
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int mt7915_mcu_rdd_background_enable(struct mt7915_phy *phy,
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struct cfg80211_chan_def *chandef);
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struct cfg80211_chan_def *chandef);
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int mt7915_mcu_rf_regval(struct mt7915_dev *dev, u32 regidx, u32 *val, bool set);
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int mt7915_mcu_wa_cmd(struct mt7915_dev *dev, int cmd, u32 a1, u32 a2, u32 a3);
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int mt7915_mcu_wa_cmd(struct mt7915_dev *dev, int cmd, u32 a1, u32 a2, u32 a3);
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int mt7915_mcu_fw_log_2_host(struct mt7915_dev *dev, u8 type, u8 ctrl);
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int mt7915_mcu_fw_log_2_host(struct mt7915_dev *dev, u8 type, u8 ctrl);
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int mt7915_mcu_fw_dbg_ctrl(struct mt7915_dev *dev, u32 module, u8 level);
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int mt7915_mcu_fw_dbg_ctrl(struct mt7915_dev *dev, u32 module, u8 level);
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