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drm/i915: Relocate intel_crtc_active()
Move intel_crtc_active() next to its only remaining user (pre-g4x wm code). Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191127201222.16669-4-ville.syrjala@linux.intel.com Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
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@ -1045,25 +1045,6 @@ bool bxt_find_best_dpll(struct intel_crtc_state *crtc_state,
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NULL, best_clock);
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NULL, best_clock);
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}
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}
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bool intel_crtc_active(struct intel_crtc *crtc)
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{
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/* Be paranoid as we can arrive here with only partial
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* state retrieved from the hardware during setup.
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*
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* We can ditch the adjusted_mode.crtc_clock check as soon
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* as Haswell has gained clock readout/fastboot support.
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*
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* We can ditch the crtc->primary->state->fb check as soon as we can
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* properly reconstruct framebuffers.
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*
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* FIXME: The intel_crtc->active here should be switched to
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* crtc->state->active once we have proper CRTC states wired up
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* for atomic.
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*/
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return crtc->active && crtc->base.primary->state->fb &&
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crtc->config->hw.adjusted_mode.crtc_clock;
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}
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enum transcoder intel_pipe_to_cpu_transcoder(struct drm_i915_private *dev_priv,
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enum transcoder intel_pipe_to_cpu_transcoder(struct drm_i915_private *dev_priv,
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enum pipe pipe)
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enum pipe pipe)
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{
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{
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@ -565,7 +565,6 @@ bool bxt_find_best_dpll(struct intel_crtc_state *crtc_state,
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struct dpll *best_clock);
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struct dpll *best_clock);
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int chv_calc_dpll_params(int refclk, struct dpll *pll_clock);
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int chv_calc_dpll_params(int refclk, struct dpll *pll_clock);
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bool intel_crtc_active(struct intel_crtc *crtc);
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bool hsw_crtc_state_ips_capable(const struct intel_crtc_state *crtc_state);
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bool hsw_crtc_state_ips_capable(const struct intel_crtc_state *crtc_state);
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void hsw_enable_ips(const struct intel_crtc_state *crtc_state);
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void hsw_enable_ips(const struct intel_crtc_state *crtc_state);
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void hsw_disable_ips(const struct intel_crtc_state *crtc_state);
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void hsw_disable_ips(const struct intel_crtc_state *crtc_state);
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@ -814,6 +814,25 @@ static bool intel_wm_plane_visible(const struct intel_crtc_state *crtc_state,
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return plane_state->uapi.visible;
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return plane_state->uapi.visible;
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}
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}
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static bool intel_crtc_active(struct intel_crtc *crtc)
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{
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/* Be paranoid as we can arrive here with only partial
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* state retrieved from the hardware during setup.
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*
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* We can ditch the adjusted_mode.crtc_clock check as soon
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* as Haswell has gained clock readout/fastboot support.
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*
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* We can ditch the crtc->primary->state->fb check as soon as we can
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* properly reconstruct framebuffers.
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*
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* FIXME: The intel_crtc->active here should be switched to
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* crtc->state->active once we have proper CRTC states wired up
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* for atomic.
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*/
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return crtc->active && crtc->base.primary->state->fb &&
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crtc->config->hw.adjusted_mode.crtc_clock;
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}
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static struct intel_crtc *single_enabled_crtc(struct drm_i915_private *dev_priv)
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static struct intel_crtc *single_enabled_crtc(struct drm_i915_private *dev_priv)
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{
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{
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struct intel_crtc *crtc, *enabled = NULL;
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struct intel_crtc *crtc, *enabled = NULL;
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