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8d38084891
Make firmware/dsp56k/bootstrap.asm buildable on a56, the free Motorola DSP56001 assembler (http://www.zdomain.com/a56.html). Summary of changes: - Remove '<' and '>' candy (they specify explicit addressing modes, which a56 don't grok, but uses implicitly anyway). - Replace 'move' with 'movem' when accessing program memory. - Rename a few labels to avoid duplicates (which a56 can't handle). Signed-off-by: Robert Millan <rmh@aybabtu.com> Cc: Jaswinder Singh <jaswinder@infradead.org> Cc: David Woodhouse <dwmw2@infradead.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
99 lines
2.9 KiB
NASM
99 lines
2.9 KiB
NASM
; Author: Frederik Noring <noring@nocrew.org>
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;
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; This file is subject to the terms and conditions of the GNU General Public
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; License. See the file COPYING in the main directory of this archive
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; for more details.
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; DSP56k loader
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; Host Interface
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M_BCR EQU $FFFE ; Port A Bus Control Register
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M_PBC EQU $FFE0 ; Port B Control Register
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M_PBDDR EQU $FFE2 ; Port B Data Direction Register
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M_PBD EQU $FFE4 ; Port B Data Register
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M_PCC EQU $FFE1 ; Port C Control Register
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M_PCDDR EQU $FFE3 ; Port C Data Direction Register
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M_PCD EQU $FFE5 ; Port C Data Register
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M_HCR EQU $FFE8 ; Host Control Register
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M_HSR EQU $FFE9 ; Host Status Register
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M_HRX EQU $FFEB ; Host Receive Data Register
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M_HTX EQU $FFEB ; Host Transmit Data Register
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; SSI, Synchronous Serial Interface
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M_RX EQU $FFEF ; Serial Receive Data Register
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M_TX EQU $FFEF ; Serial Transmit Data Register
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M_CRA EQU $FFEC ; SSI Control Register A
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M_CRB EQU $FFED ; SSI Control Register B
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M_SR EQU $FFEE ; SSI Status Register
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M_TSR EQU $FFEE ; SSI Time Slot Register
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; Exception Processing
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M_IPR EQU $FFFF ; Interrupt Priority Register
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org P:$0
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start jmp <$40
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org P:$40
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; ; Zero 16384 DSP X and Y words
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; clr A #0,r0
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; clr B #0,r4
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; do #64,<_block1
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; rep #256
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; move A,X:(r0)+ B,Y:(r4)+
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;_block1 ; Zero (32768-512) Program words
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; clr A #512,r0
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; do #126,<_block2
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; rep #256
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; move A,P:(r0)+
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;_block2
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; Copy DSP program control
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move #real,r0
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move #upload,r1
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do #upload_end-upload,_copy
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movem P:(r0)+,x0
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movem x0,P:(r1)+
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_copy movep #4,X:<<M_HCR
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movep #$c00,X:<<M_IPR
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and #<$fe,mr
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jmp upload
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real
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org P:$7ea9
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upload
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movep #1,X:<<M_PBC
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movep #0,X:<<M_BCR
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next jclr #0,X:<<M_HSR,*
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movep X:<<M_HRX,A
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move #>3,x0
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cmp x0,A #>1,x0
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jeq <$0
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_get_address
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jclr #0,X:<<M_HSR,_get_address
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movep X:<<M_HRX,r0
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_get_length
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jclr #0,X:<<M_HSR,_get_length
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movep X:<<M_HRX,y0
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cmp x0,A #>2,x0
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jeq load_X
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cmp x0,A
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jeq load_Y
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load_P do y0,_load_P
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jclr #0,X:<<M_HSR,*
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movep X:<<M_HRX,P:(r0)+
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_load_P jmp next
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load_X do y0,_load_X
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jclr #0,X:<<M_HSR,*
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movep X:<<M_HRX,X:(r0)+
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_load_X jmp next
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load_Y do y0,_load_Y
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jclr #0,X:<<M_HSR,*
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movep X:<<M_HRX,Y:(r0)+
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_load_Y jmp next
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upload_end
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end
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