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		48555339be
		
	
	
	
	
		
			
			This stack includes:
1. Dxe phase support by:
   1) SdMmcPciHcDxe driver to consume PciIo and produce
      SdMmcPassThru.
   2) SdDxe driver to consume SdMmcPassThru to produce
      BlkIo1/BlkIo2.
   3) EmmcDxe driver to consume SdMmcPassThru to produce
      BlkIo1/BlkIo2/SSP.
2. Pei phase support
   1) SdBlockIoPei driver to consume SdMmcHostController
      Ppi and produce VirutalBlkIo1&2.
   2) EmmcBlockIoPei driver to consume SdMmcHostController
      Ppi and produce VirutalBlkIo1&2.
   3) SdMmcPciHcPei driver to produce SdMmcHostController
      Ppi.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
		
	
			
		
			
				
	
	
		
			65 lines
		
	
	
		
			2.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			65 lines
		
	
	
		
			2.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /** @file
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| 
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| Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
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| 
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| This program and the accompanying materials
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| are licensed and made available under the terms and conditions
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| of the BSD License which accompanies this distribution.  The
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| full text of the license may be found at
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| http://opensource.org/licenses/bsd-license.php
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| 
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| THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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| WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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| 
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| **/
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| 
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| #ifndef _EDKII_PEI_SD_MMC_HOST_CONTROLLER_PPI_H_
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| #define _EDKII_PEI_SD_MMC_HOST_CONTROLLER_PPI_H_
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| 
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| ///
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| /// Global ID for the EDKII_SD_MMC_HOST_CONTROLLER_PPI.
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| ///
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| #define EDKII_SD_MMC_HOST_CONTROLLER_PPI_GUID \
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|   { \
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|     0xb30dfeed, 0x947f, 0x4396, { 0xb1, 0x5a, 0xdf, 0xbd, 0xb9, 0x16, 0xdc, 0x24 } \
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|   }
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| 
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| ///
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| /// Forward declaration for the SD_MMC_HOST_CONTROLLER_PPI.
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| ///
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| typedef struct _EDKII_SD_MMC_HOST_CONTROLLER_PPI  EDKII_SD_MMC_HOST_CONTROLLER_PPI;
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| 
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| /**
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|   Get the MMIO base address of SD/MMC host controller.
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| 
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|   @param[in]     This            The protocol instance pointer.
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|   @param[in]     ControllerId    The ID of the SD/MMC host controller.
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|   @param[in,out] MmioBar         The pointer to store the array of available
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|                                  SD/MMC host controller slot MMIO base addresses.
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|                                  The entry number of the array is specified by BarNum.
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|   @param[out]    BarNum          The pointer to store the supported bar number.
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| 
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|   @retval EFI_SUCCESS            The operation succeeds.
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|   @retval EFI_INVALID_PARAMETER  The parameters are invalid.
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| 
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| **/
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| typedef
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| EFI_STATUS
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| (EFIAPI *EDKII_SD_MMC_HC_GET_MMIO_BAR)(
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|   IN     EDKII_SD_MMC_HOST_CONTROLLER_PPI *This,
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|   IN     UINT8                            ControllerId,
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|   IN OUT UINTN                            **MmioBar,
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|      OUT UINT8                            *BarNum
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|   );
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| 
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| ///
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| /// This PPI contains a set of services to interact with the SD_MMC host controller.
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| ///
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| struct _EDKII_SD_MMC_HOST_CONTROLLER_PPI {
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|   EDKII_SD_MMC_HC_GET_MMIO_BAR               GetSdMmcHcMmioBar;
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| };
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| 
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| extern EFI_GUID gEdkiiPeiSdMmcHostControllerPpiGuid;
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| 
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| #endif
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