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Avoid use of Local APIC Base Address MSR (MSR_IA32_APIC_BASE_ADDRESS) if there is only 1 CPU present. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17218 6f19259b-4bc3-4df7-8a09-765794883524 |
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| .. | ||
| Ia32 | ||
| X64 | ||
| DebugAgent.c | ||
| DebugAgent.h | ||
| DebugMp.c | ||
| DebugMp.h | ||
| DebugTimer.c | ||
| DebugTimer.h | ||