mirror_edk2/ArmPkg/Library/ArmLib/ArmLib.c
Michael D Kinney 4059386c70 ArmPkg: Replace BSD License with BSD+Patent License
https://bugzilla.tianocore.org/show_bug.cgi?id=1373

Replace BSD 2-Clause License with BSD+Patent License.  This change is
based on the following emails:

  https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html
  https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html

RFCs with detailed process for the license change:

  V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html
  V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html
  V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2019-04-09 09:10:21 -07:00

102 lines
1.4 KiB
C

/** @file
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <Base.h>
#include <Library/ArmLib.h>
#include <Library/DebugLib.h>
#include <Library/PcdLib.h>
#include "ArmLibPrivate.h"
VOID
EFIAPI
ArmSetAuxCrBit (
IN UINT32 Bits
)
{
UINT32 val = ArmReadAuxCr();
val |= Bits;
ArmWriteAuxCr(val);
}
VOID
EFIAPI
ArmUnsetAuxCrBit (
IN UINT32 Bits
)
{
UINT32 val = ArmReadAuxCr();
val &= ~Bits;
ArmWriteAuxCr(val);
}
//
// Helper functions for accessing CPUACTLR
//
VOID
EFIAPI
ArmSetCpuActlrBit (
IN UINTN Bits
)
{
UINTN Value;
Value = ArmReadCpuActlr ();
Value |= Bits;
ArmWriteCpuActlr (Value);
}
VOID
EFIAPI
ArmUnsetCpuActlrBit (
IN UINTN Bits
)
{
UINTN Value;
Value = ArmReadCpuActlr ();
Value &= ~Bits;
ArmWriteCpuActlr (Value);
}
UINTN
EFIAPI
ArmDataCacheLineLength (
VOID
)
{
return 4 << ((ArmCacheInfo () >> 16) & 0xf); // CTR_EL0.DminLine
}
UINTN
EFIAPI
ArmInstructionCacheLineLength (
VOID
)
{
return 4 << (ArmCacheInfo () & 0xf); // CTR_EL0.IminLine
}
UINTN
EFIAPI
ArmCacheWritebackGranule (
VOID
)
{
UINTN CWG;
CWG = (ArmCacheInfo () >> 24) & 0xf; // CTR_EL0.CWG
if (CWG == 0) {
return SIZE_2KB;
}
return 4 << CWG;
}