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The current SSE2 implementation of the ZeroMem(), SetMem(), SetMem16(), SetMem32 and SetMem64 functions is writing 16 bytes per 16 bytes. It hurts the performances so bad that this is even slower than a simple 'rep stos' (4% slower) in regular DRAM. To take full advantages of the 'movntdq' instruction it is better to "queue" a total of 64 bytes in the write combining buffers. This patch implement such a change. Below is a table where I measured (with 'rdtsc') the time to write an entire 100MB RAM buffer. These functions operate almost two times faster. | Function | Arch | Untouched | 64 bytes | Result | |----------+------+-----------+----------+--------| | ZeroMem | Ia32 | 17765947 | 9136062 | 1.945x | | ZeroMem | X64 | 17525170 | 9233391 | 1.898x | | SetMem | Ia32 | 17522291 | 9137272 | 1.918x | | SetMem | X64 | 17949261 | 9176978 | 1.956x | | SetMem16 | Ia32 | 18219673 | 9372062 | 1.944x | | SetMem16 | X64 | 17523331 | 9275184 | 1.889x | | SetMem32 | Ia32 | 18495036 | 9273053 | 1.994x | | SetMem32 | X64 | 17368864 | 9285885 | 1.870x | | SetMem64 | Ia32 | 18564473 | 9241362 | 2.009x | | SetMem64 | X64 | 17506951 | 9280148 | 1.886x | Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
66 lines
1.5 KiB
NASM
66 lines
1.5 KiB
NASM
;------------------------------------------------------------------------------
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;
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; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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; Module Name:
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;
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; SetMem32.nasm
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;
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; Abstract:
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;
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; SetMem32 function
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;
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; Notes:
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;
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;------------------------------------------------------------------------------
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SECTION .text
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;------------------------------------------------------------------------------
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; VOID *
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; EFIAPI
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; InternalMemSetMem32 (
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; IN VOID *Buffer,
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; IN UINTN Count,
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; IN UINT32 Value
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; );
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;------------------------------------------------------------------------------
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global ASM_PFX(InternalMemSetMem32)
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ASM_PFX(InternalMemSetMem32):
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push edi
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mov edx, [esp + 12]
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mov edi, [esp + 8]
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xor ecx, ecx
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sub ecx, edi
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and ecx, 15 ; ecx + edi aligns on 16-byte boundary
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mov eax, [esp + 16]
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jz .0
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shr ecx, 2
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cmp ecx, edx
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cmova ecx, edx
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sub edx, ecx
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rep stosd
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.0:
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mov ecx, edx
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and edx, 15
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shr ecx, 4
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jz @SetDwords
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movd xmm0, eax
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pshufd xmm0, xmm0, 0
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.1:
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movntdq [edi], xmm0
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movntdq [edi + 16], xmm0
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movntdq [edi + 32], xmm0
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movntdq [edi + 48], xmm0
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add edi, 64
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loop .1
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mfence
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@SetDwords:
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mov ecx, edx
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rep stosd
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mov eax, [esp + 8]
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pop edi
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ret
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