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		9344f09215
		
	
	
	
	
		
			
			https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
		
			
				
	
	
		
			36 lines
		
	
	
		
			874 B
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			36 lines
		
	
	
		
			874 B
		
	
	
	
		
			C
		
	
	
	
	
	
| /** @file
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|   SMM CPU I/O 2 protocol as defined in the PI 1.2 specification.
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| 
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|   This protocol provides CPU I/O and memory access within SMM.
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| 
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|   Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>
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|   SPDX-License-Identifier: BSD-2-Clause-Patent
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| 
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| **/
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| 
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| #ifndef _SMM_CPU_IO2_H_
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| #define _SMM_CPU_IO2_H_
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| 
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| #include <Protocol/MmCpuIo.h>
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| 
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| #define EFI_SMM_CPU_IO2_PROTOCOL_GUID EFI_MM_CPU_IO_PROTOCOL_GUID
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| 
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| typedef EFI_MM_CPU_IO_PROTOCOL  EFI_SMM_CPU_IO2_PROTOCOL;
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| 
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| ///
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| /// Width of the SMM CPU I/O operations
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| ///
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| #define SMM_IO_UINT8  MM_IO_UINT8
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| #define SMM_IO_UINT16 MM_IO_UINT16
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| #define SMM_IO_UINT32 MM_IO_UINT32
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| #define SMM_IO_UINT64 MM_IO_UINT64
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| 
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| typedef EFI_MM_IO_WIDTH EFI_SMM_IO_WIDTH;
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| typedef EFI_MM_CPU_IO EFI_SMM_CPU_IO2;
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| 
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| typedef EFI_MM_IO_ACCESS EFI_SMM_IO_ACCESS2;
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| 
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| extern EFI_GUID gEfiSmmCpuIo2ProtocolGuid;
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| 
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| #endif
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