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			https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
		
			
				
	
	
		
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			32 lines
		
	
	
		
			919 B
		
	
	
	
		
			C
		
	
	
	
	
	
| /** @file
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|   MM PCI Root Bridge IO protocol as defined in the PI 1.5 specification.
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| 
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|   This protocol provides PCI I/O and memory access within MM.
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| 
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|   Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
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|   SPDX-License-Identifier: BSD-2-Clause-Patent
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| 
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| **/
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| 
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| #ifndef _MM_PCI_ROOT_BRIDGE_IO_H_
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| #define _MM_PCI_ROOT_BRIDGE_IO_H_
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| 
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| #include <Protocol/PciRootBridgeIo.h>
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| 
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| #define EFI_MM_PCI_ROOT_BRIDGE_IO_PROTOCOL_GUID \
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|   { \
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|     0x8bc1714d, 0xffcb, 0x41c3, { 0x89, 0xdc, 0x6c, 0x74, 0xd0, 0x6d, 0x98, 0xea } \
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|   }
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| 
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| ///
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| /// This protocol provides the same functionality as the PCI Root Bridge I/O Protocol defined in the
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| /// UEFI 2.1 Specifcation, section 13.2, except that the functions for Map() and Unmap() may return
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| /// EFI_UNSUPPORTED.
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| ///
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| typedef EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL  EFI_MM_PCI_ROOT_BRIDGE_IO_PROTOCOL;
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| 
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| extern EFI_GUID gEfiMmPciRootBridgeIoProtocolGuid;
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| 
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| #endif
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| 
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