Feng Tian db98a8bdb8 MdeModulePkg/XhciDxe: fix a bug on TRB check in async int transfer ... The last TRB in transfer ring is a LINK type TRB, which shouldn't be accounted as a valid item in IsAsyncIntTrb(). Without this fix, the original algo will bring issue on those URBs whose TRBs crosses the transfer ring. Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>		2016-07-25 09:37:05 +08:00
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Ata	MdeModulePkg AtaBusDxe: Fix ATA commands cannot be sent to some devices	2016-07-12 20:27:25 +08:00
I2c/I2cDxe	MdeModulePkg: Convert all .uni files to utf-8	2015-12-15 04:56:23 +00:00
Isa	MdeModulePkg: Fix typos in comments and variables	2016-07-11 10:29:48 +08:00
Pci	MdeModulePkg/XhciDxe: fix a bug on TRB check in async int transfer	2016-07-25 09:37:05 +08:00
Scsi	MdeModulePkg ScsiDiskDxe: Add Erase Block Protocol support for UFS devices	2016-05-20 13:42:51 +08:00
Sd	MdeModulePkg: Fix typos in comments and variables	2016-07-11 10:29:48 +08:00
Ufs	MdeModulePkg: Fix typos in comments and variables	2016-07-11 10:29:48 +08:00
Usb	MdeModulePkg/UsbBus: reduce the port status polling before port reset	2016-07-25 09:36:41 +08:00