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The entry code in ArmPlatformStackSet () is a 1:1 transliteration of the ARM version, which uses the callee preserved registers r3 - r7 (*) to preserve the function arguments and the link register across a call to ArmPlatformIsPrimaryCore (). However, x3 - x7 are not callee preserved on AARCH64, and so we should use registers >= x19 instead. While we're at it, drop an unnecessary preserve of the link register, and simplify/deobfuscate the calculation of the secondary stack position. (*) Note that r3 is not actually a callee saved register even on ARM. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> |
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| .. | ||
| AArch64 | ||
| Arm | ||
| ArmPlatformStackLib.inf | ||