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c32c5911c4
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3459 This patch adds support for R_RISCV_PCREL_LO12_S relocation type. The logic is same as existing R_RISCV_PCREL_LO12_I relocation except the difference between load vs store instruction formats. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Bob Feng <bob.c.feng@intel.com> Cc: Yuwei Chen <yuwei.chen@intel.com> Cc: Pete Batard <pete@akeo.ie> Cc: Abner Chang <abner.chang@hpe.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by: Daniel Schaefer <daniel.schaefer@hpe.com> Acked-by: Abner Chang <abner.chang@hpe.com> Acked-by: Liming Gao <gaoliming@byosoft.com.cn> |
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| .. | ||
| BrotliCompress | ||
| Common | ||
| DevicePath | ||
| EfiRom | ||
| GenCrc32 | ||
| GenFfs | ||
| GenFv | ||
| GenFw | ||
| GenSec | ||
| Include | ||
| LzmaCompress | ||
| Makefiles | ||
| PyEfiCompressor | ||
| TianoCompress | ||
| VfrCompile | ||
| VolInfo | ||
| GNUmakefile | ||
| Makefile | ||