mirror_edk2/ArmPkg/Drivers/ArmGic/ArmGicSecLib.c
Michael D Kinney 4059386c70 ArmPkg: Replace BSD License with BSD+Patent License
https://bugzilla.tianocore.org/show_bug.cgi?id=1373

Replace BSD 2-Clause License with BSD+Patent License.  This change is
based on the following emails:

  https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html
  https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html

RFCs with detailed process for the license change:

  V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html
  V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html
  V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2019-04-09 09:10:21 -07:00

59 lines
1.5 KiB
C

/** @file
*
* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
**/
#include <Base.h>
#include <Library/DebugLib.h>
#include <Library/IoLib.h>
#include <Library/ArmGicLib.h>
/*
* This function configures the interrupts set by the mask to be secure.
*
*/
VOID
EFIAPI
ArmGicSetSecureInterrupts (
IN UINTN GicDistributorBase,
IN UINTN* GicSecureInterruptMask,
IN UINTN GicSecureInterruptMaskSize
)
{
UINTN Index;
UINT32 InterruptStatus;
// We must not have more interrupts defined by the mask than the number of available interrupts
ASSERT(GicSecureInterruptMaskSize <= (ArmGicGetMaxNumInterrupts (GicDistributorBase) / 32));
// Set all the interrupts defined by the mask as Secure
for (Index = 0; Index < GicSecureInterruptMaskSize; Index++) {
InterruptStatus = MmioRead32 (GicDistributorBase + ARM_GIC_ICDISR + (Index * 4));
MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISR + (Index * 4), InterruptStatus & (~GicSecureInterruptMask[Index]));
}
}
VOID
EFIAPI
ArmGicEnableDistributor (
IN INTN GicDistributorBase
)
{
// Turn on the GIC distributor
MmioWrite32 (GicDistributorBase + ARM_GIC_ICDDCR, 1);
}
VOID
EFIAPI
ArmGicSetupNonSecure (
IN UINTN MpId,
IN INTN GicDistributorBase,
IN INTN GicInterruptInterfaceBase
)
{
ArmGicV2SetupNonSecure (MpId, GicDistributorBase, GicInterruptInterfaceBase);
}