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b2f4da3956
In the next patches, we'll differentiate the PMBA IO port address that we program on PIIX4 vs. Q35. Normally we'd just turn PcdAcpiPmBaseAddress into a dynamic PCD. However, because we need this value in BaseRomAcpiTimerLib too (which cannot access RAM and dynamic PCDs), it must remain a build time constant. We will introduce its Q35 counterpart later. As first step, replace the PCD with a new macro in "OvmfPlatforms.h"; Jordan prefers the latter to fixed PCDs in this instance. Cc: Gabriel Somlo <somlo@cmu.edu> Cc: Jordan Justen <jordan.l.justen@intel.com> Ref: https://bugzilla.redhat.com/show_bug.cgi?id=1333238 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Tested-by: Gabriel Somlo <somlo@cmu.edu>
110 lines
2.5 KiB
C
110 lines
2.5 KiB
C
/** @file
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Reset System Library functions for OVMF
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Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include <Base.h>
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#include <Library/BaseLib.h>
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#include <Library/DebugLib.h>
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#include <Library/IoLib.h>
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#include <Library/TimerLib.h>
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#include <OvmfPlatforms.h>
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VOID
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AcpiPmControl (
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UINTN SuspendType
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)
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{
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ASSERT (SuspendType < 6);
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IoBitFieldWrite16 (PIIX4_PMBA_VALUE + 4, 10, 13, (UINT16) SuspendType);
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IoOr16 (PIIX4_PMBA_VALUE + 4, BIT13);
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CpuDeadLoop ();
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}
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/**
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Calling this function causes a system-wide reset. This sets
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all circuitry within the system to its initial state. This type of reset
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is asynchronous to system operation and operates without regard to
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cycle boundaries.
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System reset should not return, if it returns, it means the system does
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not support cold reset.
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**/
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VOID
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EFIAPI
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ResetCold (
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VOID
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)
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{
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IoWrite8 (0xCF9, BIT2 | BIT1); // 1st choice: PIIX3 RCR, RCPU|SRST
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MicroSecondDelay (50);
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IoWrite8 (0x64, 0xfe); // 2nd choice: keyboard controller
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CpuDeadLoop ();
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}
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/**
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Calling this function causes a system-wide initialization. The processors
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are set to their initial state, and pending cycles are not corrupted.
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System reset should not return, if it returns, it means the system does
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not support warm reset.
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**/
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VOID
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EFIAPI
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ResetWarm (
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VOID
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)
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{
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IoWrite8 (0x64, 0xfe);
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CpuDeadLoop ();
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}
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/**
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Calling this function causes the system to enter a power state equivalent
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to the ACPI G2/S5 or G3 states.
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System shutdown should not return, if it returns, it means the system does
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not support shut down reset.
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**/
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VOID
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EFIAPI
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ResetShutdown (
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VOID
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)
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{
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AcpiPmControl (0);
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ASSERT (FALSE);
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}
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/**
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Calling this function causes the system to enter a power state for capsule
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update.
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Reset update should not return, if it returns, it means the system does
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not support capsule update.
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**/
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VOID
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EFIAPI
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EnterS3WithImmediateWake (
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VOID
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)
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{
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AcpiPmControl (1);
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ASSERT (FALSE);
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}
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