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	__FUNCTION__ is a pre-standard extension that gcc and Visual C++ among others support, while __func__ was standardized in C99. Since it's more standard, replace __FUNCTION__ with __func__ throughout MdePkg. Visual Studio versions before VS 2015 don't support __func__ and so will fail to compile. A workaround is to define __func__ as __FUNCTION__ : #define __func__ __FUNCTION__ Signed-off-by: Rebecca Cran <rebecca@quicinc.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
		
			
				
	
	
		
			255 lines
		
	
	
		
			8.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			255 lines
		
	
	
		
			8.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/** @file
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  Cache Maintenance Functions for LoongArch.
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  LoongArch cache maintenance functions has not yet been completed, and will added in later.
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  Functions are null functions now.
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  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>
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  SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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//
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// Include common header file for this module.
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//
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#include <Base.h>
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#include <Library/BaseLib.h>
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#include <Library/DebugLib.h>
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/**
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  LoongArch data barrier operation.
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**/
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VOID
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EFIAPI
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AsmDataBarrierLoongArch (
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  VOID
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  );
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/**
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  LoongArch instruction barrier operation.
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**/
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VOID
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EFIAPI
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AsmInstructionBarrierLoongArch (
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  VOID
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  );
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/**
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  Invalidates the entire instruction cache in cache coherency domain of the
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  calling CPU.
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**/
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VOID
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EFIAPI
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InvalidateInstructionCache (
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  VOID
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  )
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{
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  AsmInstructionBarrierLoongArch ();
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}
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/**
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  Invalidates a range of instruction cache lines in the cache coherency domain
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  of the calling CPU.
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  Invalidates the instruction cache lines specified by Address and Length. If
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  Address is not aligned on a cache line boundary, then entire instruction
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  cache line containing Address is invalidated. If Address + Length is not
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  aligned on a cache line boundary, then the entire instruction cache line
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  containing Address + Length -1 is invalidated. This function may choose to
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  invalidate the entire instruction cache if that is more efficient than
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  invalidating the specified range. If Length is 0, the no instruction cache
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  lines are invalidated. Address is returned.
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  If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
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  @param[in]  Address The base address of the instruction cache lines to
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                  invalidate. If the CPU is in a physical addressing mode, then
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                  Address is a physical address. If the CPU is in a virtual
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                  addressing mode, then Address is a virtual address.
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  @param[in]  Length  The number of bytes to invalidate from the instruction cache.
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  @return Address.
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**/
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VOID *
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EFIAPI
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InvalidateInstructionCacheRange (
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  IN       VOID   *Address,
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  IN       UINTN  Length
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  )
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{
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  AsmInstructionBarrierLoongArch ();
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  return Address;
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}
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/**
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  Writes Back and Invalidates the entire data cache in cache coherency domain
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  of the calling CPU.
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  Writes Back and Invalidates the entire data cache in cache coherency domain
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  of the calling CPU. This function guarantees that all dirty cache lines are
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  written back to system memory, and also invalidates all the data cache lines
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  in the cache coherency domain of the calling CPU.
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**/
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VOID
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EFIAPI
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WriteBackInvalidateDataCache (
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  VOID
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  )
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{
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  DEBUG ((DEBUG_ERROR, "%a: Not currently implemented on LoongArch.\n", __func__));
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}
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/**
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  Writes Back and Invalidates a range of data cache lines in the cache
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  coherency domain of the calling CPU.
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  Writes Back and Invalidate the data cache lines specified by Address and
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  Length. If Address is not aligned on a cache line boundary, then entire data
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  cache line containing Address is written back and invalidated. If Address +
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  Length is not aligned on a cache line boundary, then the entire data cache
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  line containing Address + Length -1 is written back and invalidated. This
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  function may choose to write back and invalidate the entire data cache if
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  that is more efficient than writing back and invalidating the specified
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  range. If Length is 0, the no data cache lines are written back and
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  invalidated. Address is returned.
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  If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
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  @param[in]  Address The base address of the data cache lines to write back and
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                  invalidate. If the CPU is in a physical addressing mode, then
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                  Address is a physical address. If the CPU is in a virtual
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                  addressing mode, then Address is a virtual address.
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  @param[in]  Length  The number of bytes to write back and invalidate from the
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                  data cache.
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  @return Address of cache invalidation.
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**/
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VOID *
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EFIAPI
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WriteBackInvalidateDataCacheRange (
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  IN      VOID   *Address,
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  IN      UINTN  Length
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  )
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{
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  DEBUG ((DEBUG_ERROR, "%a: Not currently implemented on LoongArch.\n", __func__));
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  return Address;
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}
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/**
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  Writes Back the entire data cache in cache coherency domain of the calling
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  CPU.
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  Writes Back the entire data cache in cache coherency domain of the calling
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  CPU. This function guarantees that all dirty cache lines are written back to
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  system memory. This function may also invalidate all the data cache lines in
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  the cache coherency domain of the calling CPU.
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**/
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VOID
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EFIAPI
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WriteBackDataCache (
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  VOID
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  )
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{
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  WriteBackInvalidateDataCache ();
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}
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/**
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  Writes Back a range of data cache lines in the cache coherency domain of the
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  calling CPU.
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  Writes Back the data cache lines specified by Address and Length. If Address
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  is not aligned on a cache line boundary, then entire data cache line
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  containing Address is written back. If Address + Length is not aligned on a
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  cache line boundary, then the entire data cache line containing Address +
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  Length -1 is written back. This function may choose to write back the entire
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  data cache if that is more efficient than writing back the specified range.
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  If Length is 0, the no data cache lines are written back. This function may
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  also invalidate all the data cache lines in the specified range of the cache
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  coherency domain of the calling CPU. Address is returned.
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  If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
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  @param[in]  Address The base address of the data cache lines to write back. If
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                  the CPU is in a physical addressing mode, then Address is a
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                  physical address. If the CPU is in a virtual addressing
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                  mode, then Address is a virtual address.
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  @param[in]  Length  The number of bytes to write back from the data cache.
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  @return Address of cache written in main memory.
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**/
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VOID *
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EFIAPI
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WriteBackDataCacheRange (
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  IN      VOID   *Address,
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  IN      UINTN  Length
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  )
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{
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  DEBUG ((DEBUG_ERROR, "%a: Not currently implemented on LoongArch.\n", __func__));
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  return Address;
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}
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/**
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  Invalidates the entire data cache in cache coherency domain of the calling
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  CPU.
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  Invalidates the entire data cache in cache coherency domain of the calling
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  CPU. This function must be used with care because dirty cache lines are not
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  written back to system memory. It is typically used for cache diagnostics. If
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  the CPU does not support invalidation of the entire data cache, then a write
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  back and invalidate operation should be performed on the entire data cache.
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**/
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VOID
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EFIAPI
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InvalidateDataCache (
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  VOID
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  )
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{
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  AsmDataBarrierLoongArch ();
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}
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/**
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  Invalidates a range of data cache lines in the cache coherency domain of the
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  calling CPU.
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  Invalidates the data cache lines specified by Address and Length. If Address
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  is not aligned on a cache line boundary, then entire data cache line
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  containing Address is invalidated. If Address + Length is not aligned on a
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  cache line boundary, then the entire data cache line containing Address +
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  Length -1 is invalidated. This function must never invalidate any cache lines
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  outside the specified range. If Length is 0, the no data cache lines are
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  invalidated. Address is returned. This function must be used with care
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  because dirty cache lines are not written back to system memory. It is
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  typically used for cache diagnostics. If the CPU does not support
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  invalidation of a data cache range, then a write back and invalidate
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  operation should be performed on the data cache range.
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  If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
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  @param[in]  Address The base address of the data cache lines to invalidate. If
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                  the CPU is in a physical addressing mode, then Address is a
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                  physical address. If the CPU is in a virtual addressing mode,
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                  then Address is a virtual address.
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  @param[in]  Length  The number of bytes to invalidate from the data cache.
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  @return Address.
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**/
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VOID *
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EFIAPI
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InvalidateDataCacheRange (
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  IN      VOID   *Address,
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  IN      UINTN  Length
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  )
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{
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  AsmDataBarrierLoongArch ();
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  return Address;
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}
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