mirror of
https://git.proxmox.com/git/mirror_edk2
synced 2025-10-12 20:10:17 +00:00
![]() REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1537 Use 16-bit and 32-bit IO widths for SDMMC MMIO to prevent all register accesses from being split up into 8-bit accesses. The SDHCI specification states that the registers shall be accessible in byte, word, and double word accesses. (SD Host Controller Simplified Specification 4.20 Section 1.2) Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com> |
||
---|---|---|
.. | ||
Ata | ||
I2c/I2cDxe | ||
Isa | ||
Pci | ||
Scsi | ||
Sd | ||
Ufs | ||
Usb |