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a8c1fc70db
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2218 SD specification recommends switching card bus timing before switching bus timing in controller. Emmc driver used to do this switch other way around. This commit adds controller timing switch in EmmcSwitchBusTiming function to enforce this order and removes all controller timing programming from EmmcSwitchToXXX functions. Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com> Tested-by: Hao A Wu <hao.a.wu@intel.com> Tested-by: Marcin Wojtas <mw@semihalf.com> |
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| .. | ||
| EhciDxe | ||
| EhciPei | ||
| IdeBusPei | ||
| IncompatiblePciDeviceSupportDxe | ||
| NonDiscoverablePciDeviceDxe | ||
| NvmExpressDxe | ||
| NvmExpressPei | ||
| PciBusDxe | ||
| PciHostBridgeDxe | ||
| PciSioSerialDxe | ||
| SataControllerDxe | ||
| SdMmcPciHcDxe | ||
| SdMmcPciHcPei | ||
| UfsPciHcDxe | ||
| UfsPciHcPei | ||
| UhciDxe | ||
| UhciPei | ||
| XhciDxe | ||
| XhciPei | ||