mirror of
https://git.proxmox.com/git/mirror_edk2
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f02bd3768c
EFI_SIGNATURE_16 -> SIGNATURE_16 EFI_SIGNATURE_32 -> SIGNATURE_32 EFI_SIGNATURE_64 -> SIGNATURE_64 EFI_FIELD_OFFSET -> OFFSET_OF EFI_MAX_BIT -> MAX_BIT EFI_MAX_ADDRESS -> MAX_ADDRESS These macros are not defined in UEFI spec. It makes more sense to use the equivalent macros in Base.h to avoid alias. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7050 6f19259b-4bc3-4df7-8a09-765794883524
567 lines
16 KiB
C
567 lines
16 KiB
C
/**@file
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Include for Serial Driver
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Copyright (c) 2006 - 2007, Intel Corporation.<BR>
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All rights reserved. This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef _SERIAL_H
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#define _SERIAL_H
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#include <PiDxe.h>
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#include <FrameworkPei.h>
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#include <Protocol/IsaIo.h>
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#include <Protocol/SerialIo.h>
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#include <Protocol/DevicePath.h>
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#include <Library/DebugLib.h>
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#include <Library/UefiDriverEntryPoint.h>
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#include <Library/BaseLib.h>
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#include <Library/UefiLib.h>
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#include <Library/DevicePathLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Library/UefiBootServicesTableLib.h>
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#include <Library/ReportStatusCodeLib.h>
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#include <Library/PcdLib.h>
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//
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// Driver Binding Externs
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//
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extern EFI_DRIVER_BINDING_PROTOCOL gSerialControllerDriver;
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extern EFI_COMPONENT_NAME_PROTOCOL gIsaSerialComponentName;
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extern EFI_COMPONENT_NAME2_PROTOCOL gIsaSerialComponentName2;
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//
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// Internal Data Structures
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//
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#define SERIAL_DEV_SIGNATURE SIGNATURE_32 ('s', 'e', 'r', 'd')
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#define SERIAL_MAX_BUFFER_SIZE 16
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#define TIMEOUT_STALL_INTERVAL 10
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//
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// Name: SERIAL_DEV_FIFO
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// Purpose: To define Receive FIFO and Transmit FIFO
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// Context: Used by serial data transmit and receive
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// Fields:
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// First UINT32: The index of the first data in array Data[]
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// Last UINT32: The index, which you can put a new data into array Data[]
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// Surplus UINT32: Identify how many data you can put into array Data[]
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// Data[] UINT8 : An array, which used to store data
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//
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typedef struct {
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UINT32 First;
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UINT32 Last;
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UINT32 Surplus;
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UINT8 Data[SERIAL_MAX_BUFFER_SIZE];
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} SERIAL_DEV_FIFO;
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typedef enum {
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UART8250 = 0,
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UART16450 = 1,
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UART16550 = 2,
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UART16550A= 3
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} EFI_UART_TYPE;
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//
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// Name: SERIAL_DEV
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// Purpose: To provide device specific information
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// Context:
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// Fields:
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// Signature UINTN: The identity of the serial device
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// SerialIo SERIAL_IO_PROTOCOL: Serial I/O protocol interface
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// SerialMode SERIAL_IO_MODE:
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// DevicePath EFI_DEVICE_PATH_PROTOCOL *: Device path of the serial device
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// Handle EFI_HANDLE: The handle instance attached to serial device
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// BaseAddress UINT16: The base address of specific serial device
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// Receive SERIAL_DEV_FIFO: The FIFO used to store data,
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// which is received by UART
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// Transmit SERIAL_DEV_FIFO: The FIFO used to store data,
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// which you want to transmit by UART
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// SoftwareLoopbackEnable BOOLEAN:
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// Type EFI_UART_TYPE: Specify the UART type of certain serial device
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//
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typedef struct {
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UINTN Signature;
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EFI_HANDLE Handle;
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EFI_SERIAL_IO_PROTOCOL SerialIo;
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EFI_SERIAL_IO_MODE SerialMode;
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EFI_DEVICE_PATH_PROTOCOL *DevicePath;
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EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
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UART_DEVICE_PATH UartDevicePath;
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EFI_ISA_IO_PROTOCOL *IsaIo;
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UINT16 BaseAddress;
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SERIAL_DEV_FIFO Receive;
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SERIAL_DEV_FIFO Transmit;
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BOOLEAN SoftwareLoopbackEnable;
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BOOLEAN HardwareFlowControl;
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EFI_UART_TYPE Type;
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EFI_UNICODE_STRING_TABLE *ControllerNameTable;
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} SERIAL_DEV;
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#include "ComponentName.h"
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#define SERIAL_DEV_FROM_THIS(a) CR (a, SERIAL_DEV, SerialIo, SERIAL_DEV_SIGNATURE)
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//
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// Globale Variables
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//
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extern EFI_DRIVER_BINDING_PROTOCOL gSerialControllerDriver;
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//
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// Serial Driver Defaults
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//
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#define SERIAL_PORT_DEFAULT_RECEIVE_FIFO_DEPTH 1
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#define SERIAL_PORT_DEFAULT_TIMEOUT 1000000
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/*
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#define SERIAL_PORT_DEFAULT_BAUD_RATE 115200
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#define SERIAL_PORT_DEFAULT_PARITY NoParity
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#define SERIAL_PORT_DEFAULT_DATA_BITS 8
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#define SERIAL_PORT_DEFAULT_STOP_BITS 1
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*/
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#define SERIAL_PORT_DEFAULT_CONTROL_MASK 0
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//
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// (24000000/13)MHz input clock
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//
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#define SERIAL_PORT_INPUT_CLOCK 1843200
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//
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// 115200 baud with rounding errors
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//
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#define SERIAL_PORT_MAX_BAUD_RATE 115400
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#define SERIAL_PORT_MIN_BAUD_RATE 50
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#define SERIAL_PORT_MAX_RECEIVE_FIFO_DEPTH 16
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#define SERIAL_PORT_MIN_TIMEOUT 1 // 1 uS
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#define SERIAL_PORT_MAX_TIMEOUT 100000000 // 100 seconds
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//
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// UART Registers
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//
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#define SERIAL_REGISTER_THR 0 // WO Transmit Holding Register
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#define SERIAL_REGISTER_RBR 0 // RO Receive Buffer Register
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#define SERIAL_REGISTER_DLL 0 // R/W Divisor Latch LSB
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#define SERIAL_REGISTER_DLM 1 // R/W Divisor Latch MSB
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#define SERIAL_REGISTER_IER 1 // R/W Interrupt Enable Register
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#define SERIAL_REGISTER_IIR 2 // RO Interrupt Identification Register
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#define SERIAL_REGISTER_FCR 2 // WO FIFO Cotrol Register
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#define SERIAL_REGISTER_LCR 3 // R/W Line Control Register
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#define SERIAL_REGISTER_MCR 4 // R/W Modem Control Register
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#define SERIAL_REGISTER_LSR 5 // R/W Line Status Register
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#define SERIAL_REGISTER_MSR 6 // R/W Modem Status Register
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#define SERIAL_REGISTER_SCR 7 // R/W Scratch Pad Register
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#pragma pack(1)
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//
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// Name: SERIAL_PORT_IER_BITS
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// Purpose: Define each bit in Interrupt Enable Register
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// Context:
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// Fields:
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// RAVIE Bit0: Receiver Data Available Interrupt Enable
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// THEIE Bit1: Transmistter Holding Register Empty Interrupt Enable
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// RIE Bit2: Receiver Interrupt Enable
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// MIE Bit3: Modem Interrupt Enable
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// Reserved Bit4-Bit7: Reserved
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//
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typedef struct {
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UINT8 RAVIE : 1;
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UINT8 THEIE : 1;
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UINT8 RIE : 1;
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UINT8 MIE : 1;
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UINT8 Reserved : 4;
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} SERIAL_PORT_IER_BITS;
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//
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// Name: SERIAL_PORT_IER
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// Purpose:
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// Context:
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// Fields:
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// Bits SERIAL_PORT_IER_BITS: Bits of the IER
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// Data UINT8: the value of the IER
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//
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typedef union {
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SERIAL_PORT_IER_BITS Bits;
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UINT8 Data;
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} SERIAL_PORT_IER;
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//
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// Name: SERIAL_PORT_IIR_BITS
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// Purpose: Define each bit in Interrupt Identification Register
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// Context:
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// Fields:
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// IPS Bit0: Interrupt Pending Status
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// IIB Bit1-Bit3: Interrupt ID Bits
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// Reserved Bit4-Bit5: Reserved
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// FIFOES Bit6-Bit7: FIFO Mode Enable Status
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//
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typedef struct {
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UINT8 IPS : 1;
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UINT8 IIB : 3;
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UINT8 Reserved : 2;
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UINT8 FIFOES : 2;
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} SERIAL_PORT_IIR_BITS;
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//
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// Name: SERIAL_PORT_IIR
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// Purpose:
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// Context:
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// Fields:
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// Bits SERIAL_PORT_IIR_BITS: Bits of the IIR
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// Data UINT8: the value of the IIR
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//
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typedef union {
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SERIAL_PORT_IIR_BITS Bits;
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UINT8 Data;
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} SERIAL_PORT_IIR;
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//
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// Name: SERIAL_PORT_FCR_BITS
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// Purpose: Define each bit in FIFO Control Register
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// Context:
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// Fields:
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// TRFIFOE Bit0: Transmit and Receive FIFO Enable
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// RESETRF Bit1: Reset Reciever FIFO
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// RESETTF Bit2: Reset Transmistter FIFO
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// DMS Bit3: DMA Mode Select
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// Reserved Bit4-Bit5: Reserved
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// RTB Bit6-Bit7: Receive Trigger Bits
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//
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typedef struct {
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UINT8 TRFIFOE : 1;
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UINT8 RESETRF : 1;
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UINT8 RESETTF : 1;
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UINT8 DMS : 1;
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UINT8 Reserved : 2;
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UINT8 RTB : 2;
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} SERIAL_PORT_FCR_BITS;
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//
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// Name: SERIAL_PORT_FCR
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// Purpose:
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// Context:
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// Fields:
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// Bits SERIAL_PORT_FCR_BITS: Bits of the FCR
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// Data UINT8: the value of the FCR
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//
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typedef union {
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SERIAL_PORT_FCR_BITS Bits;
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UINT8 Data;
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} SERIAL_PORT_FCR;
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//
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// Name: SERIAL_PORT_LCR_BITS
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// Purpose: Define each bit in Line Control Register
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// Context:
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// Fields:
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// SERIALDB Bit0-Bit1: Number of Serial Data Bits
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// STOPB Bit2: Number of Stop Bits
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// PAREN Bit3: Parity Enable
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// EVENPAR Bit4: Even Parity Select
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// STICPAR Bit5: Sticky Parity
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// BRCON Bit6: Break Control
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// DLAB Bit7: Divisor Latch Access Bit
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//
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typedef struct {
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UINT8 SERIALDB : 2;
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UINT8 STOPB : 1;
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UINT8 PAREN : 1;
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UINT8 EVENPAR : 1;
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UINT8 STICPAR : 1;
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UINT8 BRCON : 1;
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UINT8 DLAB : 1;
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} SERIAL_PORT_LCR_BITS;
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//
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// Name: SERIAL_PORT_LCR
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// Purpose:
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// Context:
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// Fields:
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// Bits SERIAL_PORT_LCR_BITS: Bits of the LCR
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// Data UINT8: the value of the LCR
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//
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typedef union {
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SERIAL_PORT_LCR_BITS Bits;
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UINT8 Data;
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} SERIAL_PORT_LCR;
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//
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// Name: SERIAL_PORT_MCR_BITS
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// Purpose: Define each bit in Modem Control Register
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// Context:
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// Fields:
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// DTRC Bit0: Data Terminal Ready Control
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// RTS Bit1: Request To Send Control
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// OUT1 Bit2: Output1
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// OUT2 Bit3: Output2, used to disable interrupt
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// LME; Bit4: Loopback Mode Enable
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// Reserved Bit5-Bit7: Reserved
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//
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typedef struct {
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UINT8 DTRC : 1;
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UINT8 RTS : 1;
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UINT8 OUT1 : 1;
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UINT8 OUT2 : 1;
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UINT8 LME : 1;
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UINT8 Reserved : 3;
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} SERIAL_PORT_MCR_BITS;
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//
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// Name: SERIAL_PORT_MCR
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// Purpose:
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// Context:
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// Fields:
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// Bits SERIAL_PORT_MCR_BITS: Bits of the MCR
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// Data UINT8: the value of the MCR
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//
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typedef union {
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SERIAL_PORT_MCR_BITS Bits;
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UINT8 Data;
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} SERIAL_PORT_MCR;
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//
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// Name: SERIAL_PORT_LSR_BITS
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// Purpose: Define each bit in Line Status Register
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// Context:
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// Fields:
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// DR Bit0: Receiver Data Ready Status
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// OE Bit1: Overrun Error Status
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// PE Bit2: Parity Error Status
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// FE Bit3: Framing Error Status
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// BI Bit4: Break Interrupt Status
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// THRE Bit5: Transmistter Holding Register Status
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// TEMT Bit6: Transmitter Empty Status
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// FIFOE Bit7: FIFO Error Status
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//
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typedef struct {
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UINT8 DR : 1;
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UINT8 OE : 1;
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UINT8 PE : 1;
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UINT8 FE : 1;
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UINT8 BI : 1;
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UINT8 THRE : 1;
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UINT8 TEMT : 1;
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UINT8 FIFOE : 1;
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} SERIAL_PORT_LSR_BITS;
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//
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// Name: SERIAL_PORT_LSR
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// Purpose:
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// Context:
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// Fields:
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// Bits SERIAL_PORT_LSR_BITS: Bits of the LSR
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// Data UINT8: the value of the LSR
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//
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typedef union {
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SERIAL_PORT_LSR_BITS Bits;
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UINT8 Data;
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} SERIAL_PORT_LSR;
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//
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// Name: SERIAL_PORT_MSR_BITS
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// Purpose: Define each bit in Modem Status Register
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// Context:
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// Fields:
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// DeltaCTS Bit0: Delta Clear To Send Status
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// DeltaDSR Bit1: Delta Data Set Ready Status
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// TrailingEdgeRI Bit2: Trailing Edge of Ring Indicator Status
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// DeltaDCD Bit3: Delta Data Carrier Detect Status
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// CTS Bit4: Clear To Send Status
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// DSR Bit5: Data Set Ready Status
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// RI Bit6: Ring Indicator Status
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// DCD Bit7: Data Carrier Detect Status
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//
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typedef struct {
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UINT8 DeltaCTS : 1;
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UINT8 DeltaDSR : 1;
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UINT8 TrailingEdgeRI : 1;
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UINT8 DeltaDCD : 1;
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UINT8 CTS : 1;
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UINT8 DSR : 1;
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UINT8 RI : 1;
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UINT8 DCD : 1;
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} SERIAL_PORT_MSR_BITS;
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//
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// Name: SERIAL_PORT_MSR
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// Purpose:
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// Context:
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// Fields:
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// Bits SERIAL_PORT_MSR_BITS: Bits of the MSR
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// Data UINT8: the value of the MSR
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//
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typedef union {
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SERIAL_PORT_MSR_BITS Bits;
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UINT8 Data;
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} SERIAL_PORT_MSR;
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#pragma pack()
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//
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// Define serial register I/O macros
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//
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#define READ_RBR(IO, B) IsaSerialReadPort (IO, B, SERIAL_REGISTER_RBR)
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#define READ_DLL(IO, B) IsaSerialReadPort (IO, B, SERIAL_REGISTER_DLL)
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#define READ_DLM(IO, B) IsaSerialReadPort (IO, B, SERIAL_REGISTER_DLM)
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#define READ_IER(IO, B) IsaSerialReadPort (IO, B, SERIAL_REGISTER_IER)
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#define READ_IIR(IO, B) IsaSerialReadPort (IO, B, SERIAL_REGISTER_IIR)
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#define READ_LCR(IO, B) IsaSerialReadPort (IO, B, SERIAL_REGISTER_LCR)
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#define READ_MCR(IO, B) IsaSerialReadPort (IO, B, SERIAL_REGISTER_MCR)
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#define READ_LSR(IO, B) IsaSerialReadPort (IO, B, SERIAL_REGISTER_LSR)
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#define READ_MSR(IO, B) IsaSerialReadPort (IO, B, SERIAL_REGISTER_MSR)
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#define READ_SCR(IO, B) IsaSerialReadPort (IO, B, SERIAL_REGISTER_SCR)
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#define WRITE_THR(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_THR, D)
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#define WRITE_DLL(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_DLL, D)
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#define WRITE_DLM(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_DLM, D)
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#define WRITE_IER(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_IER, D)
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#define WRITE_FCR(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_FCR, D)
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#define WRITE_LCR(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_LCR, D)
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#define WRITE_MCR(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_MCR, D)
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#define WRITE_LSR(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_LSR, D)
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#define WRITE_MSR(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_MSR, D)
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#define WRITE_SCR(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_SCR, D)
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//
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// Prototypes
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// Driver model protocol interface
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//
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EFI_STATUS
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EFIAPI
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SerialControllerDriverSupported (
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IN EFI_DRIVER_BINDING_PROTOCOL *This,
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IN EFI_HANDLE Controller,
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IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
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);
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EFI_STATUS
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EFIAPI
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SerialControllerDriverStart (
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IN EFI_DRIVER_BINDING_PROTOCOL *This,
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IN EFI_HANDLE Controller,
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IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
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);
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EFI_STATUS
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EFIAPI
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SerialControllerDriverStop (
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IN EFI_DRIVER_BINDING_PROTOCOL *This,
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IN EFI_HANDLE Controller,
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IN UINTN NumberOfChildren,
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IN EFI_HANDLE *ChildHandleBuffer
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);
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//
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// Serial I/O Protocol Interface
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//
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EFI_STATUS
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EFIAPI
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IsaSerialReset (
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IN EFI_SERIAL_IO_PROTOCOL *This
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);
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EFI_STATUS
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EFIAPI
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IsaSerialSetAttributes (
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IN EFI_SERIAL_IO_PROTOCOL *This,
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IN UINT64 BaudRate,
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IN UINT32 ReceiveFifoDepth,
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IN UINT32 Timeout,
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IN EFI_PARITY_TYPE Parity,
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IN UINT8 DataBits,
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IN EFI_STOP_BITS_TYPE StopBits
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);
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EFI_STATUS
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EFIAPI
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IsaSerialSetControl (
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IN EFI_SERIAL_IO_PROTOCOL *This,
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IN UINT32 Control
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);
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EFI_STATUS
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EFIAPI
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|
IsaSerialGetControl (
|
|
IN EFI_SERIAL_IO_PROTOCOL *This,
|
|
OUT UINT32 *Control
|
|
);
|
|
|
|
EFI_STATUS
|
|
EFIAPI
|
|
IsaSerialWrite (
|
|
IN EFI_SERIAL_IO_PROTOCOL *This,
|
|
IN OUT UINTN *BufferSize,
|
|
IN VOID *Buffer
|
|
);
|
|
|
|
EFI_STATUS
|
|
EFIAPI
|
|
IsaSerialRead (
|
|
IN EFI_SERIAL_IO_PROTOCOL *This,
|
|
IN OUT UINTN *BufferSize,
|
|
OUT VOID *Buffer
|
|
);
|
|
|
|
//
|
|
// Internal Functions
|
|
//
|
|
BOOLEAN
|
|
IsaSerialPortPresent (
|
|
IN SERIAL_DEV *SerialDevice
|
|
);
|
|
|
|
BOOLEAN
|
|
IsaSerialFifoFull (
|
|
IN SERIAL_DEV_FIFO *Fifo
|
|
);
|
|
|
|
BOOLEAN
|
|
IsaSerialFifoEmpty (
|
|
IN SERIAL_DEV_FIFO *Fifo
|
|
);
|
|
|
|
EFI_STATUS
|
|
IsaSerialFifoAdd (
|
|
IN SERIAL_DEV_FIFO *Fifo,
|
|
IN UINT8 Data
|
|
);
|
|
|
|
EFI_STATUS
|
|
IsaSerialFifoRemove (
|
|
IN SERIAL_DEV_FIFO *Fifo,
|
|
OUT UINT8 *Data
|
|
);
|
|
|
|
EFI_STATUS
|
|
IsaSerialReceiveTransmit (
|
|
IN SERIAL_DEV *SerialDevice
|
|
);
|
|
|
|
UINT8
|
|
IsaSerialReadPort (
|
|
IN EFI_ISA_IO_PROTOCOL *IsaIo,
|
|
IN UINT16 BaseAddress,
|
|
IN UINT32 Offset
|
|
);
|
|
|
|
VOID
|
|
IsaSerialWritePort (
|
|
IN EFI_ISA_IO_PROTOCOL *IsaIo,
|
|
IN UINT16 BaseAddress,
|
|
IN UINT32 Offset,
|
|
IN UINT8 Data
|
|
);
|
|
|
|
#endif
|