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mirror_edk2/MdeModulePkg/Library/BaseSerialPortLib16550
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Leo Duran a05a8a5aa1 MdeModulePkg/Library/BaseSerialPortLib16550: Ensure FIFO Polled Mode 
Put the UART in FIFO Polled Mode by clearing IER after setting FCR.
Also, add comments to show DLAB state for registers 0 and 1.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leo Duran <leo.duran@amd.com>
Cc: Star Zeng <star.zeng@intel.com>
CC: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2018-06-11 10:40:20 +08:00
..
BaseSerialPortLib16550.c MdeModulePkg/Library/BaseSerialPortLib16550: Ensure FIFO Polled Mode 2018-06-11 10:40:20 +08:00
BaseSerialPortLib16550.inf MdePkg/BaseSerialPortLib16550: Support UARTs with a register stride greater than 1 byte. 2015-04-27 19:44:40 +00:00
BaseSerialPortLib16550.uni MdeModulePkg: Convert all .uni files to utf-8 2015-12-15 04:56:23 +00:00