Prince Agyeman efe3f0099c CorebootPayloadPkg: fixed GCC49 and GCC5 hang in PeiCore ... Section alignment of .data in GCC49 and GCC5 are 0x40 rather than 0x20 in GCC48 and below. This causes a hang in PeiCore. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Prince Agyeman <prince.agyeman@intel.com> Reviewed by: Maurice Ma <maurice.ma@intel.com>		2016-08-17 23:38:12 -07:00
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FbGop	CorebootPayloadPkg: Switch to use generic BdxDxe driver	2016-05-20 10:11:56 -07:00
Library	CorebootModulePkg/PciHostBridgeLib: Fix PCI 64bit memory BAR size issue	2016-05-27 14:28:37 -07:00
BuildAndIntegrationInstructions.txt	CorebootPayloadPkg: Rename CorebootPayloadPkgX64.dsc X64 -> Ia32X64	2015-04-14 00:23:17 +00:00
Contributions.txt	Coreboot*Pkg/Contributions.txt: Update example email address	2015-04-14 00:23:29 +00:00
CorebootPayloadPkg.dec	CorebootPayloadPkg: Add coreboot PlatfromBootManagerLib implementation	2016-05-20 10:11:55 -07:00
CorebootPayloadPkg.fdf	CorebootPayloadPkg: fixed GCC49 and GCC5 hang in PeiCore	2016-08-17 23:38:12 -07:00
CorebootPayloadPkgIa32.dsc	CorebootPayloadPkg : Added MpInitLib to CorebootPayloadPkg.dsc	2016-08-17 23:37:23 -07:00
CorebootPayloadPkgIa32X64.dsc	CorebootPayloadPkg : Added MpInitLib to CorebootPayloadPkg.dsc	2016-08-17 23:37:23 -07:00
License.txt	Pkg-Module: Add Coreboot Payload Package	2015-03-25 21:13:26 +00:00