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BZ:2562: https://bugzilla.tianocore.org/show_bug.cgi?id=2562 EDK CI for RISC-V architecture Enable RISC-V architecture for RISC-V EDK2 CI testing. Signed-off-by: Abner Chang <abner.chang@hpe.com> Reviewed-by: Sean Brogan <sean.brogan@microsoft.com> Cc: Bret Barkelew <Bret.Barkelew@microsoft.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Bob Feng <bob.c.feng@intel.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Gilbert Chen <gilbert.chen@hpe.com> Cc: Daniel Helmut Schaefer <daniel.schaefer@hpe.com> |
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| .. | ||
| CYGWIN_NT-5.1-i686 | ||
| Darwin-i386/Arm | ||
| gcc_aarch64_linux_ext_dep.yaml | ||
| gcc_arm_linux_ext_dep.yaml | ||
| gcc_riscv64_unknown_ext_dep.yaml | ||
| iasl_ext_dep.yaml | ||
| nasm_ext_dep.yaml | ||