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Add PCDs PcdCpuMicrocodePatchAddress and PcdCpuMicrocodePatchRegionSize that are used to detect microcode patch from microcode region. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18000 6f19259b-4bc3-4df7-8a09-765794883524
78 lines
3.4 KiB
Plaintext
78 lines
3.4 KiB
Plaintext
## @file UefiCpuPkg.dec
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# This Package provides UEFI compatible CPU modules and libraries.
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#
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# Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>
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#
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# This program and the accompanying materials are licensed and made available under
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# the terms and conditions of the BSD License which accompanies this distribution.
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# The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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##
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[Defines]
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DEC_SPECIFICATION = 0x00010005
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PACKAGE_NAME = UefiCpuPkg
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PACKAGE_UNI_FILE = UefiCpuPkg.uni
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PACKAGE_GUID = 2171df9b-0d39-45aa-ac37-2de190010d23
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PACKAGE_VERSION = 0.3
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[Includes]
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Include
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[LibraryClasses]
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## @libraryclass Defines some routines that are generic for IA32 family CPU
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## to be UEFI specification compliant.
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##
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UefiCpuLib|Include/Library/UefiCpuLib.h
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[LibraryClasses.IA32, LibraryClasses.X64]
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## @libraryclass Provides functions to manage MTRR settings on IA32 and X64 CPUs.
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##
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MtrrLib|Include/Library/MtrrLib.h
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## @libraryclass Provides functions to manage the Local APIC on IA32 and X64 CPUs.
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##
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LocalApicLib|Include/Library/LocalApicLib.h
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[Guids]
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gUefiCpuPkgTokenSpaceGuid = { 0xac05bf33, 0x995a, 0x4ed4, { 0xaa, 0xb8, 0xef, 0x7a, 0xe8, 0xf, 0x5c, 0xb0 }}
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#
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# [Error.gUefiCpuPkgTokenSpaceGuid]
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# 0x80000001 | Invalid value provided.
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#
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[PcdsFixedAtBuild, PcdsPatchableInModule]
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## This value is the CPU Local Apic base address, which aligns the address on a 4-KByte boundary.
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# @Prompt Configure base address of CPU Local Apic
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# @Expression 0x80000001 | (gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress & 0xfff) == 0
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gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress|0xfee00000|UINT32|0x00000001
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## Specifies delay value in microseconds after sending out an INIT IPI.
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# @Prompt Configure delay value after send an INIT IPI
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gUefiCpuPkgTokenSpaceGuid.PcdCpuInitIpiDelayInMicroSeconds|10000|UINT32|0x30000002
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## Specifies max supported number of Logical Processors.
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# @Prompt Configure max supported number of Logical Processorss
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gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|64|UINT32|0x00000002
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## This value specifies the Application Processor (AP) stack size, used for Mp Service, which must
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## aligns the address on a 4-KByte boundary.
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# @Prompt Configure stack size for Application Processor (AP)
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gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize|0x8000|UINT32|0x00000003
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[PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
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## Specifies timeout value in microseconds for the BSP to detect all APs for the first time.
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# @Prompt Timeout for the BSP to detect all APs for the first time.
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gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|50000|UINT32|0x00000004
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## Specifies the base address of the first microcode Patch in the microcode Region.
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# @Prompt Microcode Region base address.
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gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0x0|UINT64|0x00000005
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## Specifies the size of the microcode Region.
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# @Prompt Microcode Region size.
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gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0x0|UINT64|0x00000006
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[UserExtensions.TianoCore."ExtraFiles"]
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UefiCpuPkgExtra.uni
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