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	https://svn.code.sf.net/p/edk2/code/trunk/edk2/, which are for MinnowBoard MAX open source project. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: David Wei <david.wei@intel.com> Reviewed-by: Mike Wu <mike.wu@intel.com> Reviewed-by: Hot Tian <hot.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16599 6f19259b-4bc3-4df7-8a09-765794883524
		
			
				
	
	
		
			57 lines
		
	
	
		
			2.1 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			57 lines
		
	
	
		
			2.1 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
/**************************************************************************;
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;*                                                                        *;
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;*                                                                        *;
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;*    Intel Corporation - ACPI Reference Code for the Baytrail            *;
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;*    Family of Customer Reference Boards.                                *;
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;*                                                                        *;
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;*                                                                        *;
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;*    Copyright (c)  2011  - 2014, Intel Corporation. All rights reserved   *;
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;
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; This program and the accompanying materials are licensed and made available under
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; the terms and conditions of the BSD License that accompanies this distribution.
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; The full text of the license may be found at
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; http://opensource.org/licenses/bsd-license.php.
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;
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; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;
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;*                                                                        *;
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;*                                                                        *;
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;**************************************************************************/
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OperationRegion(PXCS,PCI_Config,0x40,0xC0)
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Field(PXCS,AnyAcc, NoLock, Preserve)
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{
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  Offset(0x10), // LCTL - Link Control Register
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  L0SE, 1,      // 0, L0s Entry Enabled
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  , 7,
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  Offset(0x12), // LSTS - Link Status Register
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  , 13,
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  LASX, 1,      // 0, Link Active Status
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  Offset(0x1A), // SLSTS[7:0] - Slot Status Register
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  ABPX, 1,      // 0, Attention Button Pressed
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  , 2,
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  PDCX, 1,      // 3, Presence Detect Changed
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  , 2,
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  PDSX, 1,      // 6, Presence Detect State
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  , 1,
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  Offset(0x20), // RSTS - Root Status Register
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  , 16,
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  PSPX, 1,      // 16,        PME Status
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}
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Device(PXSX)
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{
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  Name(_ADR, 0x00000000)
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  // NOTE:  Any PCIE Hot-Plug dependency for this port is
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  // specific to the CRB.  Please modify the code based on
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  // your platform requirements.
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  Name(_PRW, Package() {9,4})
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}
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