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07da1ac8c4
CpuExceptionHandlerLib has code that contains absolute relocations, not supported by Xcode for X64, and it then copies this code to an alternate location in memory. It is very hard to write IP relative self-modifiying code. I had to update AsmVectorNumFixup() to also patch in the absolute addressess after the code was copied. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Anderw Fish <afish@apple.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16068 6f19259b-4bc3-4df7-8a09-765794883524
439 lines
12 KiB
ArmAsm
439 lines
12 KiB
ArmAsm
#------------------------------------------------------------------------------ ;
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# Copyright (c) 2012 - 2014, Intel Corporation. All rights reserved.<BR>
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php.
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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# Module Name:
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#
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# ExceptionHandlerAsm.S
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#
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# Abstract:
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#
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# x64 CPU Exception Handler
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#
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# Notes:
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#
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#------------------------------------------------------------------------------
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ASM_GLOBAL ASM_PFX(CommonExceptionHandler)
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#EXTRN ASM_PFX(mErrorCodeFlag):DWORD # Error code flags for exceptions
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#EXTRN ASM_PFX(mDoFarReturnFlag):QWORD # Do far return flag
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.text
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#ifdef __APPLE__
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# macros are different between GNU and Xcode as.
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.macro IDT_MACRO
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push $0
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#else
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.macro IDT_MACRO arg
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push \arg
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#endif
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jmp ASM_PFX(CommonInterruptEntry)
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.endm
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AsmIdtVectorBegin:
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IDT_MACRO $0
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IDT_MACRO $1
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IDT_MACRO $2
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IDT_MACRO $3
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IDT_MACRO $4
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IDT_MACRO $5
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IDT_MACRO $6
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IDT_MACRO $7
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IDT_MACRO $8
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IDT_MACRO $9
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IDT_MACRO $10
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IDT_MACRO $11
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IDT_MACRO $12
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IDT_MACRO $13
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IDT_MACRO $14
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IDT_MACRO $15
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IDT_MACRO $16
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IDT_MACRO $17
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IDT_MACRO $18
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IDT_MACRO $19
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IDT_MACRO $20
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IDT_MACRO $21
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IDT_MACRO $22
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IDT_MACRO $23
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IDT_MACRO $24
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IDT_MACRO $25
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IDT_MACRO $26
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IDT_MACRO $27
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IDT_MACRO $28
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IDT_MACRO $29
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IDT_MACRO $30
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IDT_MACRO $31
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AsmIdtVectorEnd:
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HookAfterStubHeaderBegin:
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.byte 0x6a # push
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PatchVectorNum:
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.byte 0 # 0 will be fixed
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.byte 0xe9 # jmp ASM_PFX(HookAfterStubHeaderEnd)
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PatchFuncAddress:
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.set HOOK_ADDRESS, ASM_PFX(HookAfterStubHeaderEnd) - . - 4
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.long HOOK_ADDRESS # will be fixed
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ASM_GLOBAL ASM_PFX(HookAfterStubHeaderEnd)
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ASM_PFX(HookAfterStubHeaderEnd):
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pushq %rax
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movq %rsp, %rax
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andl $0x0fffffff0, %esp # make sure 16-byte aligned for exception context
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subq $0x18, %rsp # reserve room for filling exception data later
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pushq %rcx
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movq 8(%rax), %rcx
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bt %ecx, ASM_PFX(mErrorCodeFlag)(%rip)
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jnc NoErrorData
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pushq (%rsp) # push additional rcx to make stack alignment
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NoErrorData:
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xchgq (%rsp), %rcx # restore rcx, save Exception Number in stack
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movq (%rax), %rax # restore rax
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#---------------------------------------;
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# CommonInterruptEntry ;
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#---------------------------------------;
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# The follow algorithm is used for the common interrupt routine.
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ASM_GLOBAL ASM_PFX(CommonInterruptEntry)
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ASM_PFX(CommonInterruptEntry):
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cli
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#
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# All interrupt handlers are invoked through interrupt gates, so
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# IF flag automatically cleared at the entry point
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#
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#
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# Calculate vector number
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#
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xchgq (%rsp), %rcx # get the return address of call, actually, it is the address of vector number.
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andq $0x0FF, %rcx
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cmp $32, %ecx # Intel reserved vector for exceptions?
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jae NoErrorCode
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pushq %rax
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movl ASM_PFX(mErrorCodeFlag)(%rip), %eax
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bt %ecx, %eax
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popq %rax
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jc CommonInterruptEntry_al_0000
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NoErrorCode:
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#
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# Push a dummy error code on the stack
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# to maintain coherent stack map
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#
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pushq (%rsp)
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movq $0, 8(%rsp)
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CommonInterruptEntry_al_0000:
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pushq %rbp
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movq %rsp, %rbp
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pushq $0 # check EXCEPTION_HANDLER_CONTEXT.OldIdtHandler
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pushq $0 # check EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag
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#
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# Stack:
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# +---------------------+ <-- 16-byte aligned ensured by processor
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# + Old SS +
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# +---------------------+
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# + Old RSP +
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# +---------------------+
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# + RFlags +
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# +---------------------+
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# + CS +
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# +---------------------+
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# + RIP +
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# +---------------------+
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# + Error Code +
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# +---------------------+
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# + RCX / Vector Number +
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# +---------------------+
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# + RBP +
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# +---------------------+ <-- RBP, 16-byte aligned
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#
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#
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# Since here the stack pointer is 16-byte aligned, so
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# EFI_FX_SAVE_STATE_X64 of EFI_SYSTEM_CONTEXT_x64
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# is 16-byte aligned
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#
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#; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
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#; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
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pushq %r15
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pushq %r14
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pushq %r13
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pushq %r12
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pushq %r11
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pushq %r10
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pushq %r9
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pushq %r8
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pushq %rax
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pushq 8(%rbp) # RCX
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pushq %rdx
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pushq %rbx
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pushq 48(%rbp) # RSP
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pushq (%rbp) # RBP
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pushq %rsi
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pushq %rdi
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#; UINT64 Gs, Fs, Es, Ds, Cs, Ss; insure high 16 bits of each is zero
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movzwq 56(%rbp), %rax
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pushq %rax # for ss
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movzwq 32(%rbp), %rax
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pushq %rax # for cs
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movl %ds, %eax
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pushq %rax
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movl %es, %eax
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pushq %rax
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movl %fs, %eax
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pushq %rax
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movl %gs, %eax
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pushq %rax
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movq %rcx, 8(%rbp) # save vector number
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#; UINT64 Rip;
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pushq 24(%rbp)
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#; UINT64 Gdtr[2], Idtr[2];
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xorq %rax, %rax
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pushq %rax
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pushq %rax
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sidt (%rsp)
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xchgq 2(%rsp), %rax
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xchgq (%rsp), %rax
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xchgq 8(%rsp), %rax
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xorq %rax, %rax
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pushq %rax
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pushq %rax
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sgdt (%rsp)
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xchgq 2(%rsp), %rax
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xchgq (%rsp), %rax
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xchgq 8(%rsp), %rax
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#; UINT64 Ldtr, Tr;
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xorq %rax, %rax
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str %ax
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pushq %rax
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sldt %ax
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pushq %rax
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#; UINT64 RFlags;
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pushq 40(%rbp)
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#; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
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movq %cr8, %rax
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pushq %rax
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movq %cr4, %rax
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orq $0x208, %rax
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movq %rax, %cr4
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pushq %rax
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mov %cr3, %rax
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pushq %rax
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mov %cr2, %rax
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pushq %rax
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xorq %rax, %rax
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pushq %rax
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mov %cr0, %rax
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pushq %rax
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#; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
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movq %dr7, %rax
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pushq %rax
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movq %dr6, %rax
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pushq %rax
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movq %dr3, %rax
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pushq %rax
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movq %dr2, %rax
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pushq %rax
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movq %dr1, %rax
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pushq %rax
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movq %dr0, %rax
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pushq %rax
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#; FX_SAVE_STATE_X64 FxSaveState;
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subq $512, %rsp
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movq %rsp, %rdi
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.byte 0x0f, 0x0ae, 0x07 #fxsave [rdi]
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#; UEFI calling convention for x64 requires that Direction flag in EFLAGs is clear
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cld
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#; UINT32 ExceptionData;
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pushq 16(%rbp)
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#; Prepare parameter and call
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mov 8(%rbp), %rcx
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mov %rsp, %rdx
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#
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# Per X64 calling convention, allocate maximum parameter stack space
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# and make sure RSP is 16-byte aligned
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#
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subq $40, %rsp
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call ASM_PFX(CommonExceptionHandler)
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addq $40, %rsp
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cli
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#; UINT64 ExceptionData;
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addq $8, %rsp
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#; FX_SAVE_STATE_X64 FxSaveState;
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movq %rsp, %rsi
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.byte 0x0f, 0x0ae, 0x0E # fxrstor [rsi]
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addq $512, %rsp
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#; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
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#; Skip restoration of DRx registers to support in-circuit emualators
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#; or debuggers set breakpoint in interrupt/exception context
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addq $48, %rsp
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#; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
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popq %rax
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movq %rax, %cr0
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addq $8, %rsp # not for Cr1
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popq %rax
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movq %rax, %cr2
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popq %rax
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movq %rax, %cr3
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popq %rax
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movq %rax, %cr4
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popq %rax
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movq %rax, %cr8
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#; UINT64 RFlags;
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popq 40(%rbp)
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#; UINT64 Ldtr, Tr;
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#; UINT64 Gdtr[2], Idtr[2];
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#; Best not let anyone mess with these particular registers...
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addq $48, %rsp
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#; UINT64 Rip;
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popq 24(%rbp)
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#; UINT64 Gs, Fs, Es, Ds, Cs, Ss;
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popq %rax
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# mov %rax, %gs ; not for gs
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popq %rax
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# mov %rax, %fs ; not for fs
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# (X64 will not use fs and gs, so we do not restore it)
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popq %rax
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movl %eax, %es
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popq %rax
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movl %eax, %ds
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popq 32(%rbp) # for cs
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popq 56(%rbp) # for ss
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#; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
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#; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
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popq %rdi
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popq %rsi
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addq $8, %rsp # not for rbp
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popq 48(%rbp) # for rsp
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popq %rbx
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popq %rdx
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popq %rcx
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popq %rax
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popq %r8
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popq %r9
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popq %r10
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popq %r11
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popq %r12
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popq %r13
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popq %r14
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popq %r15
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movq %rbp, %rsp
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popq %rbp
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addq $16, %rsp
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cmpq $0, -32(%rsp) # check EXCEPTION_HANDLER_CONTEXT.OldIdtHandler
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jz DoReturn # check EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag
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cmpb $1, -40(%rsp)
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jz ErrorCode
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jmp *-32(%rsp)
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ErrorCode:
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subq $8, %rsp
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jmp *-24(%rsp)
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DoReturn:
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pushq %rax
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movq ASM_PFX(mDoFarReturnFlag)(%rip), %rax
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cmpq $0, %rax # Check if need to do far return instead of IRET
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popq %rax
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jz DoIret
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pushq %rax
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movq %rsp, %rax # save old RSP to rax
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movq 0x20(%rsp), %rsp
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pushq 0x10(%rax) # save CS in new location
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pushq 0x8(%rax) # save EIP in new location
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pushq 0x18(%rax) # save EFLAGS in new location
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movq (%rax), %rax # restore rax
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popfq # restore EFLAGS
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.byte 0x48 # prefix to composite "retq" with next "retf"
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#ifdef __APPLE__
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.byte 0xCB
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#else
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retf # far return
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#endif
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DoIret:
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iretq
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#-------------------------------------------------------------------------------------
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# AsmGetTemplateAddressMap (&AddressMap);
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#-------------------------------------------------------------------------------------
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# comments here for definition of address map
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ASM_GLOBAL ASM_PFX(AsmGetTemplateAddressMap)
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ASM_PFX(AsmGetTemplateAddressMap):
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pushq %rbp
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movq %rsp, %rbp
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leaq AsmIdtVectorBegin(%rip), %rax
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movq %rax, (%rcx)
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.set ENTRY_SIZE, ASM_PFX(HookAfterStubHeaderEnd) - HookAfterStubHeaderBegin
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movq $(ENTRY_SIZE), 0x08(%rcx)
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leaq HookAfterStubHeaderBegin(%rip), %rax
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movq %rax, 0x10(%rcx)
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popq %rbp
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ret
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#-------------------------------------------------------------------------------------
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# VOID
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# EFIAPI
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# AsmVectorNumFixup (
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# IN VOID *NewVectorAddr, // RCX
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# IN UINT8 VectorNum // RDX
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# IN VOID *OldVectorAddr, // R8
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# );
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#-------------------------------------------------------------------------------------
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ASM_GLOBAL ASM_PFX(AsmVectorNumFixup)
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ASM_PFX(AsmVectorNumFixup):
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pushq %rbp
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movq %rsp, %rbp
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# Patch vector #
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movb %dl, (PatchVectorNum - HookAfterStubHeaderBegin)(%rcx)
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# Patch Function address
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subq %rcx, %r8 # Calculate the offset value
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movl (PatchFuncAddress - HookAfterStubHeaderBegin)(%rcx), %eax
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addq %r8, %rax
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movl %eax, (PatchFuncAddress - HookAfterStubHeaderBegin)(%rcx)
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popq %rbp
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ret
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#END
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