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mirror_edk2/UefiCpuPkg/Library/BaseRiscVMmuLib
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Tuan Phan f220dcbba8 UefiCpuPkg: RISC-V: Support MMU with SV39/48/57 mode 
During CpuDxe initialization, MMU will be setup with the highest
mode that HW supports.

Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2023-07-15 14:10:18 +00:00
..
BaseRiscVMmuLib.c UefiCpuPkg: RISC-V: Support MMU with SV39/48/57 mode 2023-07-15 14:10:18 +00:00
BaseRiscVMmuLib.inf UefiCpuPkg: RISC-V: Support MMU with SV39/48/57 mode 2023-07-15 14:10:18 +00:00
RiscVMmuCore.S UefiCpuPkg: RISC-V: Support MMU with SV39/48/57 mode 2023-07-15 14:10:18 +00:00