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153 lines
7.3 KiB
Diff
153 lines
7.3 KiB
Diff
From 1c34cd56bc59b1540e0a814d2f80ade77daa9248 Mon Sep 17 00:00:00 2001
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From: Josh Stone <jistone@redhat.com>
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Date: Tue, 11 Sep 2018 17:52:01 +0000
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Subject: [PATCH] [GlobalISel] Lower dbg.declare into indirect DBG_VALUE
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Summary:
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D31439 changed the semantics of dbg.declare to take the address of a
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variable as the first argument, making it indirect. It specifically
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updated FastISel for this change here:
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https://reviews.llvm.org/D31439#change-WVArzi177jPl
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GlobalISel needs to follow suit, or else it will be missing a level of
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indirection in the generated debuginfo. This problem was seen in a Rust
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debuginfo test on aarch64, since GlobalISel is used at -O0 for aarch64.
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https://github.com/rust-lang/rust/issues/49807
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https://bugzilla.redhat.com/show_bug.cgi?id=1611597
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https://bugzilla.redhat.com/show_bug.cgi?id=1625768
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Reviewers: dblaikie, aprantl, t.p.northover, javed.absar, rnk
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Reviewed By: rnk
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Subscribers: #debug-info, rovka, kristof.beyls, JDevlieghere, llvm-commits, tstellar
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Differential Revision: https://reviews.llvm.org/D51749
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341969 91177308-0d34-0410-b5e6-96231b3b80d8
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---
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lib/CodeGen/GlobalISel/IRTranslator.cpp | 9 ++-
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test/CodeGen/AArch64/GlobalISel/debug-cpp.ll | 67 +++++++++++++++++++
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.../CodeGen/AArch64/GlobalISel/debug-insts.ll | 4 +-
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3 files changed, 74 insertions(+), 6 deletions(-)
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create mode 100644 test/CodeGen/AArch64/GlobalISel/debug-cpp.ll
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Index: llvm-toolchain-7-7/lib/CodeGen/GlobalISel/IRTranslator.cpp
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===================================================================
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--- llvm-toolchain-7-7.orig/lib/CodeGen/GlobalISel/IRTranslator.cpp
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+++ llvm-toolchain-7-7/lib/CodeGen/GlobalISel/IRTranslator.cpp
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@@ -763,9 +763,12 @@ bool IRTranslator::translateKnownIntrins
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// instructions (in fact, they get ignored if they *do* exist).
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MF->setVariableDbgInfo(DI.getVariable(), DI.getExpression(),
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getOrCreateFrameIndex(*AI), DI.getDebugLoc());
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- } else
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- MIRBuilder.buildDirectDbgValue(getOrCreateVReg(*Address),
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- DI.getVariable(), DI.getExpression());
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+ } else {
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+ // A dbg.declare describes the address of a source variable, so lower it
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+ // into an indirect DBG_VALUE.
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+ MIRBuilder.buildIndirectDbgValue(getOrCreateVReg(*Address),
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+ DI.getVariable(), DI.getExpression());
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+ }
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return true;
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}
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case Intrinsic::vaend:
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Index: llvm-toolchain-7-7/test/CodeGen/AArch64/GlobalISel/debug-cpp.ll
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===================================================================
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--- /dev/null
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+++ llvm-toolchain-7-7/test/CodeGen/AArch64/GlobalISel/debug-cpp.ll
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@@ -0,0 +1,67 @@
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+; RUN: llc -global-isel -mtriple=aarch64 %s -stop-after=irtranslator -o - | FileCheck %s
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+; RUN: llc -mtriple=aarch64 -global-isel --global-isel-abort=0 -o /dev/null
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+
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+; struct NTCopy {
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+; NTCopy();
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+; NTCopy(const NTCopy &);
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+; int x;
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+; };
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+; int foo(NTCopy o) {
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+; return o.x;
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+; }
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+
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+; ModuleID = 'ntcopy.cpp'
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+source_filename = "ntcopy.cpp"
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+target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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+target triple = "aarch64-unknown-linux-gnu"
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+
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+%struct.NTCopy = type { i32 }
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+
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+; CHECK-LABEL: name: _Z3foo6NTCopy
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+; CHECK: DBG_VALUE debug-use %{{[0-9]+}}(p0), 0, !23, !DIExpression(), debug-location !24
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+; Function Attrs: noinline nounwind optnone
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+define dso_local i32 @_Z3foo6NTCopy(%struct.NTCopy* %o) #0 !dbg !7 {
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+entry:
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+ call void @llvm.dbg.declare(metadata %struct.NTCopy* %o, metadata !23, metadata !DIExpression()), !dbg !24
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+ %x = getelementptr inbounds %struct.NTCopy, %struct.NTCopy* %o, i32 0, i32 0, !dbg !25
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+ %0 = load i32, i32* %x, align 4, !dbg !25
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+ ret i32 %0, !dbg !26
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+}
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+
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+; Function Attrs: nounwind readnone speculatable
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+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
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+
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+attributes #0 = { noinline nounwind optnone }
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+attributes #1 = { nounwind readnone speculatable }
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+
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+!llvm.dbg.cu = !{!0}
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+!llvm.module.flags = !{!3, !4, !5}
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+!llvm.ident = !{!6}
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+
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+!0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, file: !1, producer: "clang version 8.0.0 ", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, nameTableKind: None)
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+!1 = !DIFile(filename: "ntcopy.cpp", directory: "/tmp")
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+!2 = !{}
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+!3 = !{i32 2, !"Dwarf Version", i32 4}
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+!4 = !{i32 2, !"Debug Info Version", i32 3}
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+!5 = !{i32 1, !"wchar_size", i32 4}
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+!6 = !{!"clang version 8.0.0 "}
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+!7 = distinct !DISubprogram(name: "foo", linkageName: "_Z3foo6NTCopy", scope: !1, file: !1, line: 6, type: !8, isLocal: false, isDefinition: true, scopeLine: 6, flags: DIFlagPrototyped, isOptimized: false, unit: !0, retainedNodes: !2)
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+!8 = !DISubroutineType(types: !9)
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+!9 = !{!10, !11}
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+!10 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
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+!11 = distinct !DICompositeType(tag: DW_TAG_structure_type, name: "NTCopy", file: !1, line: 1, size: 32, flags: DIFlagTypePassByReference, elements: !12, identifier: "_ZTS6NTCopy")
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+!12 = !{!13, !14, !18}
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+!13 = !DIDerivedType(tag: DW_TAG_member, name: "x", scope: !11, file: !1, line: 4, baseType: !10, size: 32)
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+!14 = !DISubprogram(name: "NTCopy", scope: !11, file: !1, line: 2, type: !15, isLocal: false, isDefinition: false, scopeLine: 2, flags: DIFlagPrototyped, isOptimized: false)
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+!15 = !DISubroutineType(types: !16)
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+!16 = !{null, !17}
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+!17 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !11, size: 64, flags: DIFlagArtificial | DIFlagObjectPointer)
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+!18 = !DISubprogram(name: "NTCopy", scope: !11, file: !1, line: 3, type: !19, isLocal: false, isDefinition: false, scopeLine: 3, flags: DIFlagPrototyped, isOptimized: false)
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+!19 = !DISubroutineType(types: !20)
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+!20 = !{null, !17, !21}
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+!21 = !DIDerivedType(tag: DW_TAG_reference_type, baseType: !22, size: 64)
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+!22 = !DIDerivedType(tag: DW_TAG_const_type, baseType: !11)
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+!23 = !DILocalVariable(name: "o", arg: 1, scope: !7, file: !1, line: 6, type: !11)
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+!24 = !DILocation(line: 6, column: 16, scope: !7)
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+!25 = !DILocation(line: 7, column: 12, scope: !7)
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+!26 = !DILocation(line: 7, column: 3, scope: !7)
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Index: llvm-toolchain-7-7/test/CodeGen/AArch64/GlobalISel/debug-insts.ll
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===================================================================
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--- llvm-toolchain-7-7.orig/test/CodeGen/AArch64/GlobalISel/debug-insts.ll
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+++ llvm-toolchain-7-7/test/CodeGen/AArch64/GlobalISel/debug-insts.ll
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@@ -6,18 +6,16 @@
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; CHECK: - { id: {{.*}}, name: in.addr, type: default, offset: 0, size: {{.*}}, alignment: {{.*}},
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; CHECK-NEXT: callee-saved-register: '', callee-saved-restored: true,
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; CHECK-NEXT: debug-info-variable: '!11', debug-info-expression: '!DIExpression()',
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-; CHECK: DBG_VALUE debug-use %0(s32), debug-use $noreg, !11, !DIExpression(), debug-location !12
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define void @debug_declare(i32 %in) #0 !dbg !7 {
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entry:
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%in.addr = alloca i32, align 4
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store i32 %in, i32* %in.addr, align 4
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call void @llvm.dbg.declare(metadata i32* %in.addr, metadata !11, metadata !DIExpression()), !dbg !12
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- call void @llvm.dbg.declare(metadata i32 %in, metadata !11, metadata !DIExpression()), !dbg !12
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ret void, !dbg !12
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}
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; CHECK-LABEL: name: debug_declare_vla
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-; CHECK: DBG_VALUE debug-use %{{[0-9]+}}(p0), debug-use $noreg, !14, !DIExpression(), debug-location !15
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+; CHECK: DBG_VALUE debug-use %{{[0-9]+}}(p0), 0, !14, !DIExpression(), debug-location !15
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define void @debug_declare_vla(i32 %in) #0 !dbg !13 {
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entry:
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%vla.addr = alloca i32, i32 %in
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