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Add patch to fix register spilling on powerpcspe
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John Paul Adrian Glaubitz
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debian/changelog
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debian/changelog
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@ -2,6 +2,7 @@ llvm-toolchain-7 (1:7.0.1~+rc2-9) UNRELEASED; urgency=medium
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[ John Paul Adrian Glaubitz ]
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[ John Paul Adrian Glaubitz ]
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* Add patch to add powerpcspe support to clang
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* Add patch to add powerpcspe support to clang
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* Add patch to fix register spilling on powerpcspe
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-- John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de> Wed, 05 Dec 2018 09:22:19 +0100
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-- John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de> Wed, 05 Dec 2018 09:22:19 +0100
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88
debian/patches/D54409-powerpcspe-register-spilling.diff
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88
debian/patches/D54409-powerpcspe-register-spilling.diff
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@ -0,0 +1,88 @@
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Description: PowerPC/SPE: Fix register spilling for SPE registers
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Author: Justin Hibbits <jrh29@alumni.cwru.edu>
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Origin: https://reviews.llvm.org/D54409
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Last-Update: 2018-12-05
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--- llvm-toolchain-7-7.0.1~+rc2.orig/lib/Target/PowerPC/PPCRegisterInfo.cpp
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+++ llvm-toolchain-7-7.0.1~+rc2/lib/Target/PowerPC/PPCRegisterInfo.cpp
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@@ -844,6 +844,9 @@ static unsigned offsetMinAlign(const Mac
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case PPC::STXSD:
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case PPC::STXSSP:
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return 4;
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+ case PPC::EVLDD:
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+ case PPC::EVSTDD:
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+ return 8;
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case PPC::LXV:
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case PPC::STXV:
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return 16;
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@@ -960,7 +963,10 @@ PPCRegisterInfo::eliminateFrameIndex(Mac
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// happen in invalid code.
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assert(OpC != PPC::DBG_VALUE &&
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"This should be handled in a target-independent way");
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- if (!noImmForm && ((isInt<16>(Offset) &&
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+ bool canBeImmediate = (OpC == PPC::EVSTDD || OpC == PPC::EVLDD) ?
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+ isUInt<8>(Offset) :
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+ isInt<16>(Offset);
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+ if (!noImmForm && ((canBeImmediate &&
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((Offset % offsetMinAlign(MI)) == 0)) ||
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OpC == TargetOpcode::STACKMAP ||
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OpC == TargetOpcode::PATCHPOINT)) {
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--- llvm-toolchain-7-7.0.1~+rc2.orig/test/CodeGen/PowerPC/spe.ll
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+++ llvm-toolchain-7-7.0.1~+rc2/test/CodeGen/PowerPC/spe.ll
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@@ -525,18 +525,53 @@ entry:
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; CHECK: #NO_APP
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}
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-define double @test_spill(double %a) nounwind {
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+declare double @test_spill_spe_regs(double, double);
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+define dso_local void @test_func2() #0 {
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entry:
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+ ret void
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+}
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+
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+@global_var1 = global i32 0, align 4
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+define double @test_spill(double %a, i32 %a1, i64 %a2, i8 * %a3, i32 *%a4, i32* %a5) nounwind {
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+entry:
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+ %a.addr = alloca double, align 8
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+ %a1.addr = alloca i32, align 4
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+ %a2.addr = alloca i64, align 8
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+ %a3.addr = alloca i8*, align 4
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+ %a4.addr = alloca i32*, align 4
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+ %a5.addr = alloca i32*, align 4
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+ %ptr = alloca i32*, align 4
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+ %v1 = alloca [8 x i32], align 4
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+ %v2 = alloca [7 x i32], align 4
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+ %v3 = alloca [5 x i32], align 4
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+ store i32 %a1, i32* %a1.addr, align 4
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+ store i64 %a2, i64* %a2.addr, align 8
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+ store i8* %a3, i8** %a3.addr, align 4
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+ store i32* %a4, i32** %a4.addr, align 4
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+ store i32* %a5, i32** %a5.addr, align 4
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+ store i32* @global_var1, i32** %ptr, align 4
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%0 = fadd double %a, %a
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- call void asm sideeffect "","~{r0},~{r3},~{s4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{r16},~{r17},~{r18},~{r19},~{r20},~{r21},~{r22},~{r23},~{r24},~{r25},~{r26},~{r27},~{r28},~{r29},~{r30},~{r31}"() nounwind
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+ call void asm sideeffect "","~{s0},~{s3},~{s4},~{s5},~{s6},~{s7},~{s8},~{s9},~{s10},~{s11},~{s12},~{s13},~{s14},~{s15},~{s16},~{s17},~{s18},~{s19},~{s20},~{s21},~{s22},~{s23},~{s24},~{s25},~{s26},~{s27},~{s28},~{s29},~{s30},~{s31}"() nounwind
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%1 = fadd double %0, 3.14159
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+ %2 = load i32*, i32** %ptr, align 4
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+ %3 = bitcast [8 x i32]* %v1 to i8*
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+ call void @llvm.memset.p0i8.i32(i8* align 4 %3, i8 0, i32 24, i1 true)
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+ %4 = load i32*, i32** %a5.addr, align 4
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+ store i32 0, i32* %4, align 4
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+ call void @test_func2()
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+ %5 = bitcast [7 x i32]* %v2 to i8*
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+ call void @llvm.memset.p0i8.i32(i8* align 4 %5, i8 0, i32 20, i1 true)
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br label %return
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return:
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ret double %1
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; CHECK-LABEL: test_spill
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-; CHECK: efdadd
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+; CHECK: li [[VREG:[0-9]+]], 256
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+; CHECK: evstddx {{[0-9]+}}, {{[0-9]+}}, [[VREG]]
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+; CHECK-NOT: evstdd {{[0-9]+}}, 256({{[0-9]+}}
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; CHECK: evstdd
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+; CHECK: efdadd
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; CHECK: evldd
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}
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+declare void @llvm.memset.p0i8.i32(i8* nocapture writeonly, i8, i32, i1) #1
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1
debian/patches/series
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1
debian/patches/series
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@ -106,3 +106,4 @@ strip-ignore-deterministic-archives.diff
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# powerpcspe
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# powerpcspe
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D49754-powerpcspe-clang.diff
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D49754-powerpcspe-clang.diff
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D54409-powerpcspe-register-spilling.diff
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