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Add patch D158066 from llvm-toolchain-16 branch
This commit is contained in:
Gianfranco Costamagna
parent
a4366d1be2
commit
ccce4c11df
355
debian/patches/D158066.patch
vendored
Normal file
355
debian/patches/D158066.patch
vendored
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@ -0,0 +1,355 @@
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Description: Fix SIMD compatibility headers on ppc64el
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Origin/Author: https://reviews.llvm.org/D158066
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Bug-Debian: https://bugs.debian.org/1049362
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diff --git a/clang/include/clang/Basic/BuiltinsPPC.def b/clang/include/clang/Basic/BuiltinsPPC.def
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--- a/clang/include/clang/Basic/BuiltinsPPC.def
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+++ b/clang/include/clang/Basic/BuiltinsPPC.def
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@@ -151,8 +151,10 @@
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TARGET_BUILTIN(__builtin_ppc_extract_sig, "ULLid", "", "power9-vector")
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BUILTIN(__builtin_ppc_mtfsb0, "vUIi", "")
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BUILTIN(__builtin_ppc_mtfsb1, "vUIi", "")
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+BUILTIN(__builtin_ppc_mffs, "d", "")
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BUILTIN(__builtin_ppc_mtfsf, "vUIiUi", "")
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BUILTIN(__builtin_ppc_mtfsfi, "vUIiUIi", "")
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+BUILTIN(__builtin_ppc_set_fpscr_rn, "di", "")
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TARGET_BUILTIN(__builtin_ppc_insert_exp, "ddULLi", "", "power9-vector")
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BUILTIN(__builtin_ppc_fmsub, "dddd", "")
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BUILTIN(__builtin_ppc_fmsubs, "ffff", "")
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diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
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--- a/clang/lib/Basic/Targets/PPC.cpp
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+++ b/clang/lib/Basic/Targets/PPC.cpp
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@@ -262,6 +262,10 @@
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Builder.defineMacro("__builtin_minfe", "__builtin_ppc_minfe");
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Builder.defineMacro("__builtin_minfl", "__builtin_ppc_minfl");
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Builder.defineMacro("__builtin_minfs", "__builtin_ppc_minfs");
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+ Builder.defineMacro("__builtin_mffs", "__builtin_ppc_mffs");
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+ Builder.defineMacro("__builtin_mffsl", "__builtin_ppc_mffsl");
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+ Builder.defineMacro("__builtin_mtfsf", "__builtin_ppc_mtfsf");
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+ Builder.defineMacro("__builtin_set_fpscr_rn", "__builtin_ppc_set_fpscr_rn");
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}
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/// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
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diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
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--- a/clang/lib/CodeGen/CGBuiltin.cpp
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+++ b/clang/lib/CodeGen/CGBuiltin.cpp
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@@ -17062,6 +17062,11 @@
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Value *Op1 = EmitScalarExpr(E->getArg(1));
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return Builder.CreateFDiv(Op0, Op1, "swdiv");
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}
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+ case PPC::BI__builtin_ppc_set_fpscr_rn:
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+ return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::ppc_setrnd),
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+ {EmitScalarExpr(E->getArg(0))});
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+ case PPC::BI__builtin_ppc_mffs:
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+ return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::ppc_readflm));
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}
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}
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diff --git a/clang/lib/Headers/ppc_wrappers/smmintrin.h b/clang/lib/Headers/ppc_wrappers/smmintrin.h
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--- a/clang/lib/Headers/ppc_wrappers/smmintrin.h
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+++ b/clang/lib/Headers/ppc_wrappers/smmintrin.h
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@@ -14,7 +14,7 @@
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#ifndef NO_WARN_X86_INTRINSICS
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/* This header is distributed to simplify porting x86_64 code that
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- makes explicit use of Intel intrinsics to powerp64/powerpc64le.
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+ makes explicit use of Intel intrinsics to powerpc64/powerpc64le.
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It is the user's responsibility to determine if the results are
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acceptable and make additional changes as necessary.
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@@ -68,10 +68,10 @@
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__asm__("mffsce %0" : "=f"(__fpscr_save.__fr));
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__enables_save.__fpscr = __fpscr_save.__fpscr & 0xf8;
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#else
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- __fpscr_save.__fr = __builtin_mffs();
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+ __fpscr_save.__fr = __builtin_ppc_mffs();
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__enables_save.__fpscr = __fpscr_save.__fpscr & 0xf8;
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__fpscr_save.__fpscr &= ~0xf8;
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- __builtin_mtfsf(0b00000011, __fpscr_save.__fr);
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+ __builtin_ppc_mtfsf(0b00000011, __fpscr_save.__fr);
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#endif
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/* Insert an artificial "read/write" reference to the variable
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read below, to ensure the compiler does not schedule
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@@ -83,10 +83,15 @@
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switch (__rounding) {
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case _MM_FROUND_TO_NEAREST_INT:
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- __fpscr_save.__fr = __builtin_mffsl();
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+#ifdef _ARCH_PWR9
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+ __fpscr_save.__fr = __builtin_ppc_mffsl();
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+#else
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+ __fpscr_save.__fr = __builtin_ppc_mffs();
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+ __fpscr_save.__fpscr &= 0x70007f0ffL;
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+#endif
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__attribute__((fallthrough));
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case _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC:
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- __builtin_set_fpscr_rn(0b00);
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+ __builtin_ppc_set_fpscr_rn(0b00);
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/* Insert an artificial "read/write" reference to the variable
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read below, to ensure the compiler does not schedule
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a read/use of the variable before the FPSCR is modified, above.
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@@ -102,7 +107,7 @@
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This can be removed if and when GCC PR102783 is fixed.
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*/
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__asm__("" : : "wa"(__r));
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- __builtin_set_fpscr_rn(__fpscr_save.__fpscr);
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+ __builtin_ppc_set_fpscr_rn(__fpscr_save.__fpscr);
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break;
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case _MM_FROUND_TO_NEG_INF:
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case _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC:
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@@ -128,9 +133,14 @@
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*/
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__asm__("" : : "wa"(__r));
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/* Restore enabled exceptions. */
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- __fpscr_save.__fr = __builtin_mffsl();
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+#ifdef _ARCH_PWR9
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+ __fpscr_save.__fr = __builtin_ppc_mffsl();
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+#else
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+ __fpscr_save.__fr = __builtin_ppc_mffs();
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+ __fpscr_save.__fpscr &= 0x70007f0ffL;
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+#endif
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__fpscr_save.__fpscr |= __enables_save.__fpscr;
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- __builtin_mtfsf(0b00000011, __fpscr_save.__fr);
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+ __builtin_ppc_mtfsf(0b00000011, __fpscr_save.__fr);
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}
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return (__m128d)__r;
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}
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@@ -159,10 +169,10 @@
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__asm__("mffsce %0" : "=f"(__fpscr_save.__fr));
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__enables_save.__fpscr = __fpscr_save.__fpscr & 0xf8;
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#else
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- __fpscr_save.__fr = __builtin_mffs();
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+ __fpscr_save.__fr = __builtin_ppc_mffs();
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__enables_save.__fpscr = __fpscr_save.__fpscr & 0xf8;
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__fpscr_save.__fpscr &= ~0xf8;
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- __builtin_mtfsf(0b00000011, __fpscr_save.__fr);
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+ __builtin_ppc_mtfsf(0b00000011, __fpscr_save.__fr);
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#endif
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/* Insert an artificial "read/write" reference to the variable
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read below, to ensure the compiler does not schedule
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@@ -174,10 +184,15 @@
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switch (__rounding) {
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case _MM_FROUND_TO_NEAREST_INT:
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- __fpscr_save.__fr = __builtin_mffsl();
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+#ifdef _ARCH_PWR9
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+ __fpscr_save.__fr = __builtin_ppc_mffsl();
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+#else
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+ __fpscr_save.__fr = __builtin_ppc_mffs();
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+ __fpscr_save.__fpscr &= 0x70007f0ffL;
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+#endif
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__attribute__((fallthrough));
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case _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC:
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- __builtin_set_fpscr_rn(0b00);
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+ __builtin_ppc_set_fpscr_rn(0b00);
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/* Insert an artificial "read/write" reference to the variable
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read below, to ensure the compiler does not schedule
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a read/use of the variable before the FPSCR is modified, above.
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@@ -193,7 +208,7 @@
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This can be removed if and when GCC PR102783 is fixed.
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*/
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__asm__("" : : "wa"(__r));
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- __builtin_set_fpscr_rn(__fpscr_save.__fpscr);
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+ __builtin_ppc_set_fpscr_rn(__fpscr_save.__fpscr);
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break;
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case _MM_FROUND_TO_NEG_INF:
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case _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC:
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@@ -219,9 +234,14 @@
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*/
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__asm__("" : : "wa"(__r));
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/* Restore enabled exceptions. */
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- __fpscr_save.__fr = __builtin_mffsl();
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+#ifdef _ARCH_PWR9
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+ __fpscr_save.__fr = __builtin_ppc_mffsl();
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+#else
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+ __fpscr_save.__fr = __builtin_ppc_mffs();
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+ __fpscr_save.__fpscr &= 0x70007f0ffL;
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+#endif
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__fpscr_save.__fpscr |= __enables_save.__fpscr;
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- __builtin_mtfsf(0b00000011, __fpscr_save.__fr);
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+ __builtin_ppc_mtfsf(0b00000011, __fpscr_save.__fr);
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}
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return (__m128)__r;
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}
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diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc.c b/clang/test/CodeGen/PowerPC/builtins-ppc.c
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--- a/clang/test/CodeGen/PowerPC/builtins-ppc.c
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+++ b/clang/test/CodeGen/PowerPC/builtins-ppc.c
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@@ -1,5 +1,8 @@
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// REQUIRES: powerpc-registered-target
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-// RUN: %clang_cc1 -triple powerpc-unknown-unknown -emit-llvm %s -o - | FileCheck %s
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+// RUN: %clang_cc1 -triple powerpc-unknown-unknown -emit-llvm %s -o - \
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+// RUN: | FileCheck %s
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+// RUN: %clang_cc1 -triple powerpc-unknown-unknown -emit-llvm %s -o - \
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+// RUN: -target-cpu pwr9 | FileCheck %s --check-prefixes=P9,CHECK
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void test_eh_return_data_regno()
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{
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@@ -26,6 +29,9 @@
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// CHECK: call double @llvm.ppc.setrnd(i32 %2)
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res = __builtin_setrnd(x);
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+
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+ // CHECK: call double @llvm.ppc.setrnd(i32 %4)
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+ res = __builtin_ppc_set_fpscr_rn(x);
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}
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void test_builtin_ppc_flm() {
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@@ -33,7 +39,10 @@
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// CHECK: call double @llvm.ppc.readflm()
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res = __builtin_readflm();
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- // CHECK: call double @llvm.ppc.setflm(double %1)
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+ // CHECK: call double @llvm.ppc.readflm()
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+ res = __builtin_ppc_mffs();
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+
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+ // CHECK: call double @llvm.ppc.setflm(double %2)
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res = __builtin_setflm(res);
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}
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diff --git a/clang/test/CodeGen/PowerPC/ppc-emmintrin.c b/clang/test/CodeGen/PowerPC/ppc-emmintrin.c
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--- a/clang/test/CodeGen/PowerPC/ppc-emmintrin.c
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+++ b/clang/test/CodeGen/PowerPC/ppc-emmintrin.c
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@@ -8,6 +8,11 @@
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// RUN: %clang -S -emit-llvm -target powerpc64le-unknown-linux-gnu -mcpu=pwr10 -ffreestanding -DNO_WARN_X86_INTRINSICS %s \
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// RUN: -ffp-contract=off -fno-discard-value-names -mllvm -disable-llvm-optzns -o - | llvm-cxxfilt -n | FileCheck %s --check-prefixes=CHECK-P10
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+// RUN: %clang -x c++ -S -emit-llvm -target powerpc64le-unknown-linux-gnu -mcpu=pwr8 -ffreestanding -DNO_WARN_X86_INTRINSICS %s \
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+// RUN: -ffp-contract=off -fno-discard-value-names -mllvm -disable-llvm-optzns -fsyntax-only
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+// RUN: %clang -x c++ -S -emit-llvm -target powerpc64le-unknown-linux-gnu -mcpu=pwr10 -ffreestanding -DNO_WARN_X86_INTRINSICS %s \
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+// RUN: -ffp-contract=off -fno-discard-value-names -mllvm -disable-llvm-optzns -fsyntax-only
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+
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// RUN: %clang -S -emit-llvm -target powerpc64-ibm-aix -mcpu=pwr8 -ffreestanding -DNO_WARN_X86_INTRINSICS %s \
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// RUN: -ffp-contract=off -fno-discard-value-names -mllvm -disable-llvm-optzns -o - | llvm-cxxfilt -n | FileCheck %s --check-prefixes=CHECK,CHECK-BE
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// RUN: %clang -S -emit-llvm -target powerpc64-ibm-aix -mcpu=pwr10 -ffreestanding -DNO_WARN_X86_INTRINSICS %s \
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diff --git a/clang/test/CodeGen/PowerPC/ppc-mmintrin.c b/clang/test/CodeGen/PowerPC/ppc-mmintrin.c
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--- a/clang/test/CodeGen/PowerPC/ppc-mmintrin.c
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+++ b/clang/test/CodeGen/PowerPC/ppc-mmintrin.c
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@@ -9,6 +9,11 @@
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// RUN: %clang -S -emit-llvm -target powerpc64le-unknown-linux-gnu -mcpu=pwr9 -DNO_WARN_X86_INTRINSICS %s \
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// RUN: -fno-discard-value-names -mllvm -disable-llvm-optzns -o - | llvm-cxxfilt -n| FileCheck %s --check-prefixes=CHECK-P9,CHECK,CHECK-LE
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+// RUN: %clang -x c++ -S -emit-llvm -target powerpc64le-unknown-linux-gnu -mcpu=pwr8 -DNO_WARN_X86_INTRINSICS %s \
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+// RUN: -fno-discard-value-names -mllvm -disable-llvm-optzns -fsyntax-only
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+// RUN: %clang -x c++ -S -emit-llvm -target powerpc64le-unknown-linux-gnu -mcpu=pwr9 -DNO_WARN_X86_INTRINSICS %s \
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+// RUN: -fno-discard-value-names -mllvm -disable-llvm-optzns -fsyntax-only
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+
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// RUN: %clang -S -emit-llvm -target powerpc64-unknown-freebsd13.0 -mcpu=pwr8 -DNO_WARN_X86_INTRINSICS %s \
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// RUN: -fno-discard-value-names -mllvm -disable-llvm-optzns -o - | llvm-cxxfilt -n | FileCheck %s --check-prefixes=CHECK-P8,CHECK,CHECK-BE
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// RUN: %clang -S -emit-llvm -target powerpc64le-unknown-freebsd13.0 -mcpu=pwr8 -DNO_WARN_X86_INTRINSICS %s \
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diff --git a/clang/test/CodeGen/PowerPC/ppc-pmmintrin.c b/clang/test/CodeGen/PowerPC/ppc-pmmintrin.c
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--- a/clang/test/CodeGen/PowerPC/ppc-pmmintrin.c
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+++ b/clang/test/CodeGen/PowerPC/ppc-pmmintrin.c
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@@ -13,6 +13,9 @@
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// RUN: %clang -S -emit-llvm -target powerpc64-ibm-aix -mcpu=pwr8 -DNO_MM_MALLOC -ffreestanding -DNO_WARN_X86_INTRINSICS %s \
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// RUN: -fno-discard-value-names -mllvm -disable-llvm-optzns -o - | llvm-cxxfilt -n | FileCheck %s
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+// RUN: %clang -x c++ -S -emit-llvm -target powerpc64le-gnu-linux -mcpu=pwr8 -DNO_MM_MALLOC -ffreestanding -DNO_WARN_X86_INTRINSICS %s \
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+// RUN: -fno-discard-value-names -mllvm -disable-llvm-optzns -fsyntax-only
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+
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#include <pmmintrin.h>
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__m128d resd, md1, md2;
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diff --git a/clang/test/CodeGen/PowerPC/ppc-smmintrin.c b/clang/test/CodeGen/PowerPC/ppc-smmintrin.c
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--- a/clang/test/CodeGen/PowerPC/ppc-smmintrin.c
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+++ b/clang/test/CodeGen/PowerPC/ppc-smmintrin.c
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@@ -15,6 +15,11 @@
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// RUN: %clang -S -emit-llvm -target powerpc64-unknown-linux-gnu -mcpu=pwr10 -ffreestanding -DNO_WARN_X86_INTRINSICS %s \
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// RUN: -fno-discard-value-names -mllvm -disable-llvm-optzns -o - | llvm-cxxfilt -n | FileCheck %s --check-prefix=P10
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+// RUN: %clang -x c++ -S -emit-llvm -target powerpc64le-unknown-linux-gnu -mcpu=pwr8 -ffreestanding -DNO_WARN_X86_INTRINSICS %s \
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+// RUN: -fno-discard-value-names -mllvm -disable-llvm-optzns -fsyntax-only
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+// RUN: %clang -x c++ -S -emit-llvm -target powerpc64le-unknown-linux-gnu -mcpu=pwr10 -ffreestanding -DNO_WARN_X86_INTRINSICS %s \
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+// RUN: -fno-discard-value-names -mllvm -disable-llvm-optzns -fsyntax-only
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+
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// RUN: %clang -S -emit-llvm -target powerpc64le-unknown-freebsd13.0 -mcpu=pwr8 -ffreestanding -DNO_WARN_X86_INTRINSICS %s \
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// RUN: -fno-discard-value-names -mllvm -disable-llvm-optzns -o - | llvm-cxxfilt -n | FileCheck %s
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// RUN: %clang -S -emit-llvm -target powerpc64-unknown-freebsd13.0 -mcpu=pwr8 -ffreestanding -DNO_WARN_X86_INTRINSICS %s \
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@@ -239,44 +244,48 @@
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// CHECK-LABEL: @test_round
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// CHECK-LABEL: define available_externally <4 x float> @_mm_round_ps(<4 x float> noundef %{{[0-9a-zA-Z_.]+}}, i32 noundef signext %{{[0-9a-zA-Z_.]+}})
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-// CHECK: call signext i32 @__builtin_mffs()
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-// CHECK: call signext i32 @__builtin_mtfsf(i32 noundef signext 3, double noundef %{{[0-9a-zA-Z_.]+}})
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+// CHECK: call double @llvm.ppc.readflm()
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+// CHECK: call void @llvm.ppc.mtfsf(i32 3, double %{{[0-9a-zA-Z_.]+}})
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// CHECK: %{{[0-9a-zA-Z_.]+}} = call <4 x float> asm "", "=^wa,0"
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-// CHECK: call signext i32 @__builtin_mffsl()
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-// CHECK: call signext i32 @__builtin_set_fpscr_rn(i32 noundef signext 0)
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+// CHECK: call double @llvm.ppc.readflm()
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+// P10: call double @llvm.ppc.mffsl()
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+// CHECK: call double @llvm.ppc.setrnd(i32 0)
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// CHECK: %{{[0-9a-zA-Z_.]+}} = call <4 x float> asm "", "=^wa,0"
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// CHECK: call <4 x float> @vec_rint(float vector[4])
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// CHECK: call void asm sideeffect "", "^wa"
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-// CHECK: call signext i32 @__builtin_set_fpscr_rn(i64 noundef %{{[0-9a-zA-Z_.]+}})
|
||||
+// CHECK: call double @llvm.ppc.setrnd(i32 %{{[0-9a-zA-Z_.]+}})
|
||||
// CHECK: call <4 x float> @vec_floor(float vector[4])
|
||||
// CHECK: call <4 x float> @vec_ceil(float vector[4])
|
||||
// CHECK: call <4 x float> @vec_trunc(float vector[4])
|
||||
// CHECK: call <4 x float> @vec_rint(float vector[4])
|
||||
// CHECK: call void asm sideeffect "", "^wa"
|
||||
-// CHECK: call signext i32 @__builtin_mffsl()
|
||||
-// CHECK: call signext i32 @__builtin_mtfsf(i32 noundef signext 3, double noundef %{{[0-9a-zA-Z_.]+}})
|
||||
+// CHECK: call double @llvm.ppc.readflm()
|
||||
+// P10: call double @llvm.ppc.mffsl()
|
||||
+// CHECK: call void @llvm.ppc.mtfsf(i32 3, double %{{[0-9a-zA-Z_.]+}})
|
||||
|
||||
// CHECK-LABEL: define available_externally <4 x float> @_mm_round_ss(<4 x float> noundef %{{[0-9a-zA-Z_.]+}}, <4 x float> noundef %{{[0-9a-zA-Z_.]+}}, i32 noundef signext %{{[0-9a-zA-Z_.]+}})
|
||||
// CHECK: call <4 x float> @_mm_round_ps(<4 x float> noundef %{{[0-9a-zA-Z_.]+}}, i32 noundef signext %{{[0-9a-zA-Z_.]+}})
|
||||
// CHECK: extractelement <4 x float> %{{[0-9a-zA-Z_.]+}}, i32 0
|
||||
|
||||
// CHECK-LABEL: define available_externally <2 x double> @_mm_round_pd(<2 x double> noundef %{{[0-9a-zA-Z_.]+}}, i32 noundef signext %{{[0-9a-zA-Z_.]+}})
|
||||
-// CHECK: call signext i32 @__builtin_mffs()
|
||||
-// CHECK: call signext i32 @__builtin_mtfsf(i32 noundef signext 3, double noundef %{{[0-9a-zA-Z_.]+}})
|
||||
+// CHECK: call double @llvm.ppc.readflm()
|
||||
+// CHECK: call void @llvm.ppc.mtfsf(i32 3, double %{{[0-9a-zA-Z_.]+}})
|
||||
// CHECK: %{{[0-9a-zA-Z_.]+}} = call <2 x double> asm "", "=^wa,0"
|
||||
-// CHECK: call signext i32 @__builtin_mffsl()
|
||||
-// CHECK: call signext i32 @__builtin_set_fpscr_rn(i32 noundef signext 0)
|
||||
+// CHECK: call double @llvm.ppc.readflm()
|
||||
+// P10: call double @llvm.ppc.mffsl()
|
||||
+// CHECK: call double @llvm.ppc.setrnd(i32 0)
|
||||
// CHECK: %{{[0-9a-zA-Z_.]+}} = call <2 x double> asm "", "=^wa,0"
|
||||
// CHECK: call <2 x double> @vec_rint(double vector[2])
|
||||
// CHECK: call void asm sideeffect "", "^wa"
|
||||
-// CHECK: call signext i32 @__builtin_set_fpscr_rn(i64 noundef %{{[0-9a-zA-Z_.]+}})
|
||||
+// CHECK: call double @llvm.ppc.setrnd(i32 %{{[0-9a-zA-Z_.]+}})
|
||||
// CHECK: call <2 x double> @vec_floor(double vector[2])
|
||||
// CHECK: call <2 x double> @vec_ceil(double vector[2])
|
||||
// CHECK: call <2 x double> @vec_trunc(double vector[2])
|
||||
// CHECK: call <2 x double> @vec_rint(double vector[2])
|
||||
// CHECK: call void asm sideeffect "", "^wa"
|
||||
-// CHECK: call signext i32 @__builtin_mffsl()
|
||||
-// CHECK: call signext i32 @__builtin_mtfsf(i32 noundef signext 3, double noundef %{{[0-9a-zA-Z_.]+}})
|
||||
+// CHECK: call double @llvm.ppc.readflm()
|
||||
+// P10: call double @llvm.ppc.mffsl()
|
||||
+// CHECK: call void @llvm.ppc.mtfsf(i32 3, double %{{[0-9a-zA-Z_.]+}})
|
||||
|
||||
// CHECK-LABEL: define available_externally <2 x double> @_mm_round_sd(<2 x double> noundef %{{[0-9a-zA-Z_.]+}}, <2 x double> noundef %{{[0-9a-zA-Z_.]+}}, i32 noundef signext %{{[0-9a-zA-Z_.]+}})
|
||||
// CHECK: call <2 x double> @_mm_round_pd(<2 x double> noundef %{{[0-9a-zA-Z_.]+}}, i32 noundef signext %{{[0-9a-zA-Z_.]+}})
|
||||
diff --git a/clang/test/CodeGen/PowerPC/ppc-tmmintrin.c b/clang/test/CodeGen/PowerPC/ppc-tmmintrin.c
|
||||
--- a/clang/test/CodeGen/PowerPC/ppc-tmmintrin.c
|
||||
+++ b/clang/test/CodeGen/PowerPC/ppc-tmmintrin.c
|
||||
@@ -13,6 +13,9 @@
|
||||
// RUN: %clang -S -emit-llvm -target powerpc64-ibm-aix -mcpu=pwr8 -ffreestanding -DNO_WARN_X86_INTRINSICS %s \
|
||||
// RUN: -fno-discard-value-names -mllvm -disable-llvm-optzns -o - | llvm-cxxfilt -n | FileCheck %s --check-prefixes=CHECK,CHECK-BE
|
||||
|
||||
+// RUN: %clang -x c++ -S -emit-llvm -target powerpc64le-gnu-linux -mcpu=pwr8 -ffreestanding -DNO_WARN_X86_INTRINSICS %s \
|
||||
+// RUN: -fno-discard-value-names -mllvm -disable-llvm-optzns -fsyntax-only
|
||||
+
|
||||
#include <tmmintrin.h>
|
||||
|
||||
__m64 res, m1, m2;
|
||||
diff --git a/clang/test/CodeGen/PowerPC/ppc-x86gprintrin.c b/clang/test/CodeGen/PowerPC/ppc-x86gprintrin.c
|
||||
--- a/clang/test/CodeGen/PowerPC/ppc-x86gprintrin.c
|
||||
+++ b/clang/test/CodeGen/PowerPC/ppc-x86gprintrin.c
|
||||
@@ -12,6 +12,9 @@
|
||||
// RUN: %clang -S -emit-llvm -target powerpc64-ibm-aix -mcpu=pwr7 -ffreestanding -DNO_WARN_X86_INTRINSICS %s \
|
||||
// RUN: -fno-discard-value-names -mllvm -disable-llvm-optzns -o - | llvm-cxxfilt -n | FileCheck %s
|
||||
|
||||
+// RUN: %clang -x c++ -S -emit-llvm -target powerpc64le-unknown-linux-gnu -mcpu=pwr7 -ffreestanding -DNO_WARN_X86_INTRINSICS %s \
|
||||
+// RUN: -fno-discard-value-names -mllvm -disable-llvm-optzns -fsyntax-only
|
||||
+
|
||||
#include <x86gprintrin.h>
|
||||
|
||||
unsigned short us;
|
||||
1
debian/patches/series
vendored
1
debian/patches/series
vendored
@ -147,3 +147,4 @@ unwind-force-pthread-dl.diff
|
||||
force-sse2-compiler-rt.diff
|
||||
bolt-disable-emit-relocs.patch
|
||||
link-grpc.diff
|
||||
D158066.patch
|
||||
|
||||
Loading…
Reference in New Issue
Block a user