diff --git a/debian/changelog b/debian/changelog index 5c90b2d3..3acfa9db 100644 --- a/debian/changelog +++ b/debian/changelog @@ -25,11 +25,68 @@ llvm-toolchain-snapshot (1:8~svn345569-1~exp1) experimental; urgency=medium [ Gianfranco Costamagna ] * Take option two in bug #877567 to fix FTBFS on mips and mipsel - [ Sylvestre Ledru ] * New snapshot release -- Sylvestre Ledru Tue, 30 Oct 2018 08:31:14 +0100 + +llvm-toolchain-7 (1:7.0.1~+rc3-2) UNRELEASED; urgency=medium + + * Fix llvm-config by stripping unnecessary flags + See also https://bugs.llvm.org/show_bug.cgi?id=8220 + (Closes: #697755, #914838) + * Improved the debian/patches/series presentation by creating categories + + -- Sylvestre Ledru Mon, 10 Dec 2018 03:49:59 -0500 + +llvm-toolchain-7 (1:7.0.1~+rc3-1) unstable; urgency=medium + + * New testing release + * disable the llvm-strip as it created too big llvm lib + + [ John Paul Adrian Glaubitz ] + * Add patch to add powerpcspe support to clang + * Add patch to fix register spilling on powerpcspe + * Add patch to optimize double parameter calling setup on powerpcspe + + -- Sylvestre Ledru Sat, 08 Dec 2018 07:29:59 +0100 + +llvm-toolchain-7 (1:7.0.1~+rc2-8) unstable; urgency=medium + + * Use llvm-strip instead of binutils strip. + Two reasons: + - with clang stage2, the dbg packages were not generated + - strip fails on stretch and other ubuntu on some archives + For this, I had to silent the --enable-deterministic-archives + option (https://bugs.llvm.org/show_bug.cgi?id=39789). + Thanks to Rebecca Palmer for the idea + (Closes: #913946) + * Change the i386 base line to avoid using sse2 extension + This is more important now that llvm is built with clang + instead of gcc. + Thanks to Fanael Linithien for the patch + (Closes: #914770, #894840) + + -- Sylvestre Ledru Sat, 01 Dec 2018 11:18:39 +0100 + +llvm-toolchain-7 (1:7.0.1~+rc2-7) unstable; urgency=medium + + * Bring back mips-rdhwr.diff as it isn't in rc2 + + -- Sylvestre Ledru Sun, 25 Nov 2018 17:00:31 +0100 + +llvm-toolchain-7 (1:7.0.1~+rc2-6) unstable; urgency=medium + + [ Samuel Thibault ] + * D53557-hurd-self-exe-realpath.diff: Fix paths returned by + llvm-config (See Bug#911817). + + [ Sylvestre Ledru ] + * Fix the FTBFS on armhf for real! Thanks to Adrian Bunk + Force the activation of FeatureVFP3 & FeatureD16 + + -- Sylvestre Ledru Sat, 24 Nov 2018 09:12:26 +0100 + llvm-toolchain-7 (1:7.0.1~+rc2-5) unstable; urgency=medium [ Samuel Thibault ] diff --git a/debian/patches/D49754-powerpcspe-clang.diff b/debian/patches/D49754-powerpcspe-clang.diff new file mode 100644 index 00000000..bc85405b --- /dev/null +++ b/debian/patches/D49754-powerpcspe-clang.diff @@ -0,0 +1,136 @@ +Description: Add -m(no-)spe, and e500 CPU definitions and support to clang +Author: Justin Hibbits +Origin: https://reviews.llvm.org/D49754 +Last-Update: 2018-12-04 + +--- llvm-toolchain-7-7.0.1~+rc2.orig/clang/include/clang/Driver/Options.td ++++ llvm-toolchain-7-7.0.1~+rc2/clang/include/clang/Driver/Options.td +@@ -2053,6 +2053,8 @@ def faltivec : Flag<["-"], "faltivec">, + def fno_altivec : Flag<["-"], "fno-altivec">, Group, Flags<[DriverOption]>; + def maltivec : Flag<["-"], "maltivec">, Group; + def mno_altivec : Flag<["-"], "mno-altivec">, Group; ++def mspe : Flag<["-"], "mspe">, Group; ++def mno_spe : Flag<["-"], "mno-spe">, Group; + def mvsx : Flag<["-"], "mvsx">, Group; + def mno_vsx : Flag<["-"], "mno-vsx">, Group; + def msecure_plt : Flag<["-"], "msecure-plt">, Group; +--- llvm-toolchain-7-7.0.1~+rc2.orig/clang/lib/Basic/Targets/PPC.cpp ++++ llvm-toolchain-7-7.0.1~+rc2/clang/lib/Basic/Targets/PPC.cpp +@@ -54,6 +54,8 @@ bool PPCTargetInfo::handleTargetFeatures + HasFloat128 = true; + } else if (Feature == "+power9-vector") { + HasP9Vector = true; ++ } else if (Feature == "+spe") { ++ HasSPE = true; + } + // TODO: Finish this list and add an assert that we've handled them + // all. +@@ -161,6 +163,8 @@ void PPCTargetInfo::getTargetDefines(con + Builder.defineMacro("__VEC__", "10206"); + Builder.defineMacro("__ALTIVEC__"); + } ++ if (HasSPE) ++ Builder.defineMacro("__SPE__"); + if (HasVSX) + Builder.defineMacro("__VSX__"); + if (HasP8Vector) +@@ -334,6 +338,7 @@ bool PPCTargetInfo::hasFeature(StringRef + .Case("extdiv", HasExtDiv) + .Case("float128", HasFloat128) + .Case("power9-vector", HasP9Vector) ++ .Case("spe", HasSPE) + .Default(false); + } + +@@ -413,16 +418,16 @@ ArrayRef PPCTar + } + + static constexpr llvm::StringLiteral ValidCPUNames[] = { +- {"generic"}, {"440"}, {"450"}, {"601"}, {"602"}, +- {"603"}, {"603e"}, {"603ev"}, {"604"}, {"604e"}, +- {"620"}, {"630"}, {"g3"}, {"7400"}, {"g4"}, +- {"7450"}, {"g4+"}, {"750"}, {"970"}, {"g5"}, +- {"a2"}, {"a2q"}, {"e500mc"}, {"e5500"}, {"power3"}, +- {"pwr3"}, {"power4"}, {"pwr4"}, {"power5"}, {"pwr5"}, +- {"power5x"}, {"pwr5x"}, {"power6"}, {"pwr6"}, {"power6x"}, +- {"pwr6x"}, {"power7"}, {"pwr7"}, {"power8"}, {"pwr8"}, +- {"power9"}, {"pwr9"}, {"powerpc"}, {"ppc"}, {"powerpc64"}, +- {"ppc64"}, {"powerpc64le"}, {"ppc64le"}, ++ {"generic"}, {"440"}, {"450"}, {"601"}, {"602"}, ++ {"603"}, {"603e"}, {"603ev"}, {"604"}, {"604e"}, ++ {"620"}, {"630"}, {"g3"}, {"7400"}, {"g4"}, ++ {"7450"}, {"g4+"}, {"750"}, {"970"}, {"g5"}, ++ {"a2"}, {"a2q"}, {"e500"}, {"e500mc"}, {"e5500"}, ++ {"power3"}, {"pwr3"}, {"power4"}, {"pwr4"}, {"power5"}, ++ {"pwr5"}, {"power5x"}, {"pwr5x"}, {"power6"}, {"pwr6"}, ++ {"power6x"}, {"pwr6x"}, {"power7"}, {"pwr7"}, {"power8"}, ++ {"pwr8"}, {"power9"}, {"pwr9"}, {"powerpc"}, {"ppc"}, ++ {"powerpc64"}, {"ppc64"}, {"powerpc64le"}, {"ppc64le"}, + }; + + bool PPCTargetInfo::isValidCPUName(StringRef Name) const { +--- llvm-toolchain-7-7.0.1~+rc2.orig/clang/lib/Basic/Targets/PPC.h ++++ llvm-toolchain-7-7.0.1~+rc2/clang/lib/Basic/Targets/PPC.h +@@ -45,7 +45,8 @@ class LLVM_LIBRARY_VISIBILITY PPCTargetI + ArchDefinePwr8 = 1 << 12, + ArchDefinePwr9 = 1 << 13, + ArchDefineA2 = 1 << 14, +- ArchDefineA2q = 1 << 15 ++ ArchDefineA2q = 1 << 15, ++ ArchDefine500v2 = 1 << 16 + } ArchDefineTypes; + + +@@ -66,6 +67,7 @@ class LLVM_LIBRARY_VISIBILITY PPCTargetI + bool HasBPERMD = false; + bool HasExtDiv = false; + bool HasP9Vector = false; ++ bool HasSPE = false; + + protected: + std::string ABI; +@@ -145,6 +147,8 @@ public: + ArchDefinePwr6x | ArchDefinePwr6 | ArchDefinePwr5x | + ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr | + ArchDefinePpcsq) ++ .Cases("e500", "e500v2", ++ ArchDefineName | ArchDefine500v2) + .Default(ArchDefineNone); + } + return CPUKnown; +--- llvm-toolchain-7-7.0.1~+rc2.orig/clang/test/Driver/ppc-features.cpp ++++ llvm-toolchain-7-7.0.1~+rc2/clang/test/Driver/ppc-features.cpp +@@ -168,6 +168,9 @@ + // RUN: %clang -target powerpc64-unknown-linux-gnu %s -mno-invariant-function-descriptors -minvariant-function-descriptors -### -o %t.o 2>&1 | FileCheck -check-prefix=CHECK-INVFUNCDESC %s + // CHECK-INVFUNCDESC: "-target-feature" "+invariant-function-descriptors" + ++// RUN: %clang -target powerpc-unknown-linux-gnu %s -mno-spe -mspe -### -o %t.o 2>&1 | FileCheck -check-prefix=CHECK-SPE %s ++// CHECK-SPE: "-target-feature" "+spe" ++ + // Assembler features + // RUN: %clang -target powerpc64-unknown-linux-gnu %s -### -o %t.o -no-integrated-as 2>&1 | FileCheck -check-prefix=CHECK_BE_AS_ARGS %s + // CHECK_BE_AS_ARGS: "-mppc64" +--- llvm-toolchain-7-7.0.1~+rc2.orig/clang/test/Misc/target-invalid-cpu-note.c ++++ llvm-toolchain-7-7.0.1~+rc2/clang/test/Misc/target-invalid-cpu-note.c +@@ -79,7 +79,7 @@ + // PPC: error: unknown target CPU 'not-a-cpu' + // PPC: note: valid target CPU values are: generic, 440, 450, 601, 602, 603, + // PPC-SAME: 603e, 603ev, 604, 604e, 620, 630, g3, 7400, g4, 7450, g4+, 750, +-// PPC-SAME: 970, g5, a2, a2q, e500mc, e5500, power3, pwr3, power4, pwr4, ++// PPC-SAME: 970, g5, a2, a2q, e500, e500mc, e5500, power3, pwr3, power4, pwr4, + // PPC-SAME: power5, pwr5, power5x, pwr5x, power6, pwr6, power6x, pwr6x, power7, + // PPC-SAME: pwr7, power8, pwr8, power9, pwr9, powerpc, ppc, powerpc64, ppc64, + // PPC-SAME: powerpc64le, ppc64le +--- llvm-toolchain-7-7.0.1~+rc2.orig/clang/test/Preprocessor/init.c ++++ llvm-toolchain-7-7.0.1~+rc2/clang/test/Preprocessor/init.c +@@ -6980,6 +6980,10 @@ + // + // PPC32-LINUX-NOT: _CALL_LINUX + // ++// RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-unknown-linux-gnu -target-feature +spe < /dev/null | FileCheck -match-full-lines -check-prefix PPC32-SPE %s ++// ++// PPC32-SPE:#define __SPE__ 1 ++// + // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-apple-darwin8 < /dev/null | FileCheck -match-full-lines -check-prefix PPC-DARWIN %s + // + // PPC-DARWIN:#define _ARCH_PPC 1 diff --git a/debian/patches/D53557-hurd-self-exe-realpath.diff b/debian/patches/D53557-hurd-self-exe-realpath.diff new file mode 100644 index 00000000..216b6ba9 --- /dev/null +++ b/debian/patches/D53557-hurd-self-exe-realpath.diff @@ -0,0 +1,74 @@ +r345104 | rnk | 2018-10-24 01:35:43 +0200 (mer. 24 oct. 2018) | 25 lignes + +[hurd] Make getMainExecutable get the real binary path + +On GNU/Hurd, llvm-config is returning bogus value, such as: + +$ llvm-config-6.0 --includedir +/usr/include + +while it should be: +$ llvm-config-6.0 --includedir +/usr/lib/llvm-6.0/include + +This is because getMainExecutable does not get the actual installation +path. On GNU/Hurd, /proc/self/exe is indeed a symlink to the path that +was used to start the program, and not the eventual binary file. Llvm's +getMainExecutable thus needs to run realpath over it to get the actual +place where llvm was installed (/usr/lib/llvm-6.0/bin/llvm-config), and +not /usr/bin/llvm-config-6.0. This will not change the result on Linux, +where /proc/self/exe already points to the eventual file. + +Patch by Samuel Thibault! + +While making changes here, I reformatted this block a bit to reduce +indentation and match 2 space indent style. + +Differential Revision: https://reviews.llvm.org/D53557 + +Index: llvm-toolchain-6.0-6.0.1/lib/Support/Unix/Path.inc +=================================================================== +--- llvm-toolchain-6.0-6.0.1.orig/lib/Support/Unix/Path.inc ++++ llvm-toolchain-6.0-6.0.1/lib/Support/Unix/Path.inc +@@ -191,14 +191,34 @@ std::string getMainExecutable(const char + char exe_path[MAXPATHLEN]; + StringRef aPath("/proc/self/exe"); + if (sys::fs::exists(aPath)) { +- // /proc is not always mounted under Linux (chroot for example). +- ssize_t len = readlink(aPath.str().c_str(), exe_path, sizeof(exe_path)); +- if (len >= 0) +- return std::string(exe_path, len); ++ // /proc is not always mounted under Linux (chroot for example). ++ ssize_t len = readlink(aPath.str().c_str(), exe_path, sizeof(exe_path)); ++ if (len < 0) ++ return ""; ++ ++ // Null terminate the string for realpath. readlink never null ++ // terminates its output. ++ len = std::min(len, ssize_t(sizeof(exe_path) - 1)); ++ exe_path[len] = '\0'; ++ ++ // At least on GNU/Hurd, /proc/self/exe is a symlink to the path that ++ // was used to start the program, and not the eventual binary file. ++ // We thus needs to run realpath over it to get the actual place ++ // where llvm was installed. ++#if _POSIX_VERSION >= 200112 || defined(__GLIBC__) ++ char *real_path = realpath(exe_path, NULL); ++ std::string ret = std::string(real_path); ++ free(real_path); ++ return ret; ++#else ++ char real_path[MAXPATHLEN]; ++ realpath(exe_path, real_path); ++ return std::string(real_path); ++#endif + } else { +- // Fall back to the classical detection. +- if (getprogpath(exe_path, argv0)) +- return exe_path; ++ // Fall back to the classical detection. ++ if (getprogpath(exe_path, argv0)) ++ return exe_path; + } + #elif defined(HAVE_DLFCN_H) && defined(HAVE_DLADDR) + // Use dladdr to get executable path if available. diff --git a/debian/patches/D54409-powerpcspe-register-spilling.diff b/debian/patches/D54409-powerpcspe-register-spilling.diff new file mode 100644 index 00000000..3a50a540 --- /dev/null +++ b/debian/patches/D54409-powerpcspe-register-spilling.diff @@ -0,0 +1,88 @@ +Description: PowerPC/SPE: Fix register spilling for SPE registers +Author: Justin Hibbits +Origin: https://reviews.llvm.org/D54409 +Last-Update: 2018-12-05 + +--- llvm-toolchain-7-7.0.1~+rc2.orig/lib/Target/PowerPC/PPCRegisterInfo.cpp ++++ llvm-toolchain-7-7.0.1~+rc2/lib/Target/PowerPC/PPCRegisterInfo.cpp +@@ -844,6 +844,9 @@ static unsigned offsetMinAlign(const Mac + case PPC::STXSD: + case PPC::STXSSP: + return 4; ++ case PPC::EVLDD: ++ case PPC::EVSTDD: ++ return 8; + case PPC::LXV: + case PPC::STXV: + return 16; +@@ -960,7 +963,10 @@ PPCRegisterInfo::eliminateFrameIndex(Mac + // happen in invalid code. + assert(OpC != PPC::DBG_VALUE && + "This should be handled in a target-independent way"); +- if (!noImmForm && ((isInt<16>(Offset) && ++ bool canBeImmediate = (OpC == PPC::EVSTDD || OpC == PPC::EVLDD) ? ++ isUInt<8>(Offset) : ++ isInt<16>(Offset); ++ if (!noImmForm && ((canBeImmediate && + ((Offset % offsetMinAlign(MI)) == 0)) || + OpC == TargetOpcode::STACKMAP || + OpC == TargetOpcode::PATCHPOINT)) { +--- llvm-toolchain-7-7.0.1~+rc2.orig/test/CodeGen/PowerPC/spe.ll ++++ llvm-toolchain-7-7.0.1~+rc2/test/CodeGen/PowerPC/spe.ll +@@ -525,18 +525,53 @@ entry: + ; CHECK: #NO_APP + } + +-define double @test_spill(double %a) nounwind { ++declare double @test_spill_spe_regs(double, double); ++define dso_local void @test_func2() #0 { + entry: ++ ret void ++} ++ ++@global_var1 = global i32 0, align 4 ++define double @test_spill(double %a, i32 %a1, i64 %a2, i8 * %a3, i32 *%a4, i32* %a5) nounwind { ++entry: ++ %a.addr = alloca double, align 8 ++ %a1.addr = alloca i32, align 4 ++ %a2.addr = alloca i64, align 8 ++ %a3.addr = alloca i8*, align 4 ++ %a4.addr = alloca i32*, align 4 ++ %a5.addr = alloca i32*, align 4 ++ %ptr = alloca i32*, align 4 ++ %v1 = alloca [8 x i32], align 4 ++ %v2 = alloca [7 x i32], align 4 ++ %v3 = alloca [5 x i32], align 4 ++ store i32 %a1, i32* %a1.addr, align 4 ++ store i64 %a2, i64* %a2.addr, align 8 ++ store i8* %a3, i8** %a3.addr, align 4 ++ store i32* %a4, i32** %a4.addr, align 4 ++ store i32* %a5, i32** %a5.addr, align 4 ++ store i32* @global_var1, i32** %ptr, align 4 + %0 = fadd double %a, %a +- call void asm sideeffect "","~{r0},~{r3},~{s4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{r16},~{r17},~{r18},~{r19},~{r20},~{r21},~{r22},~{r23},~{r24},~{r25},~{r26},~{r27},~{r28},~{r29},~{r30},~{r31}"() nounwind ++ call void asm sideeffect "","~{s0},~{s3},~{s4},~{s5},~{s6},~{s7},~{s8},~{s9},~{s10},~{s11},~{s12},~{s13},~{s14},~{s15},~{s16},~{s17},~{s18},~{s19},~{s20},~{s21},~{s22},~{s23},~{s24},~{s25},~{s26},~{s27},~{s28},~{s29},~{s30},~{s31}"() nounwind + %1 = fadd double %0, 3.14159 ++ %2 = load i32*, i32** %ptr, align 4 ++ %3 = bitcast [8 x i32]* %v1 to i8* ++ call void @llvm.memset.p0i8.i32(i8* align 4 %3, i8 0, i32 24, i1 true) ++ %4 = load i32*, i32** %a5.addr, align 4 ++ store i32 0, i32* %4, align 4 ++ call void @test_func2() ++ %5 = bitcast [7 x i32]* %v2 to i8* ++ call void @llvm.memset.p0i8.i32(i8* align 4 %5, i8 0, i32 20, i1 true) + br label %return + + return: + ret double %1 + + ; CHECK-LABEL: test_spill +-; CHECK: efdadd ++; CHECK: li [[VREG:[0-9]+]], 256 ++; CHECK: evstddx {{[0-9]+}}, {{[0-9]+}}, [[VREG]] ++; CHECK-NOT: evstdd {{[0-9]+}}, 256({{[0-9]+}} + ; CHECK: evstdd ++; CHECK: efdadd + ; CHECK: evldd + } ++declare void @llvm.memset.p0i8.i32(i8* nocapture writeonly, i8, i32, i1) #1 diff --git a/debian/patches/D54584-powerpcspe-double-parameter.diff b/debian/patches/D54584-powerpcspe-double-parameter.diff new file mode 100644 index 00000000..ceae0ae1 --- /dev/null +++ b/debian/patches/D54584-powerpcspe-double-parameter.diff @@ -0,0 +1,216 @@ +Description: PowerPC: Optimize SPE double parameter calling setup +Author: Justin Hibbits +Origin: https://reviews.llvm.org/D54583 +Last-Update: 2018-12-04 + +--- llvm-toolchain-7-7.0.1~+rc2.orig/lib/Target/PowerPC/PPCISelLowering.cpp ++++ llvm-toolchain-7-7.0.1~+rc2/lib/Target/PowerPC/PPCISelLowering.cpp +@@ -389,8 +389,16 @@ PPCTargetLowering::PPCTargetLowering(con + } else { + setOperationAction(ISD::BITCAST, MVT::f32, Expand); + setOperationAction(ISD::BITCAST, MVT::i32, Expand); +- setOperationAction(ISD::BITCAST, MVT::i64, Expand); + setOperationAction(ISD::BITCAST, MVT::f64, Expand); ++ if (Subtarget.hasSPE()) { ++ setOperationAction(ISD::BITCAST, MVT::i64, Custom); ++ } else { ++ setOperationAction(ISD::BITCAST, MVT::i64, Expand); ++ } ++ } ++ ++ if (Subtarget.hasSPE()) { ++ setOperationAction(ISD::EXTRACT_ELEMENT, MVT::i64, Custom); + } + + // We cannot sextinreg(i1). Expand to shifts. +@@ -1355,6 +1363,9 @@ const char *PPCTargetLowering::getTarget + case PPCISD::QBFLT: return "PPCISD::QBFLT"; + case PPCISD::QVLFSb: return "PPCISD::QVLFSb"; + case PPCISD::BUILD_FP128: return "PPCISD::BUILD_FP128"; ++ case PPCISD::BUILD_SPE64: return "PPCISD::BUILD_SPE64"; ++ case PPCISD::EXTRACT_SPE_LO: return "PPCISD::EXTRACT_SPE_LO"; ++ case PPCISD::EXTRACT_SPE_HI: return "PPCISD::EXTRACT_SPE_HI"; + } + return nullptr; + } +@@ -7764,6 +7775,15 @@ SDValue PPCTargetLowering::LowerBITCAST( + SDLoc dl(Op); + SDValue Op0 = Op->getOperand(0); + ++ if (Subtarget.hasSPE()) { ++ if (Op.getValueType() == MVT::f64 && ++ Op0.getOpcode() == ISD::BUILD_PAIR && ++ (Op0.getOperand(1).getValueType() == MVT::i32) && ++ (Op0.getOperand(0).getValueType() == MVT::i32)) ++ return DAG.getNode(PPCISD::BUILD_SPE64, dl, MVT::f64, Op0.getOperand(0), ++ Op0.getOperand(1)); ++ } ++ + if (!EnableQuadPrecision || + (Op.getValueType() != MVT::f128 ) || + (Op0.getOpcode() != ISD::BUILD_PAIR) || +@@ -7775,6 +7795,26 @@ SDValue PPCTargetLowering::LowerBITCAST( + Op0.getOperand(1)); + } + ++// Lower EXTRACT_ELEMENT (i64 BITCAST f64), 0/1 to evmerge* ++SDValue PPCTargetLowering::LowerEXTRACT_ELEMENT(SDValue Op, SelectionDAG &DAG) const { ++ ++ SDLoc dl(Op); ++ SDValue Op0 = Op->getOperand(0); ++ ++ if (!Subtarget.hasSPE()) ++ return SDValue(); ++ ++ if (!(Op.getValueType() == MVT::i32 && ++ Op0.getOpcode() == ISD::BITCAST)) ++ return SDValue(); ++ ++ assert(Op0.getNumOperands() > 0 && "WTF?"); ++ if (Op->getConstantOperandVal(1) == 0) ++ return DAG.getNode(PPCISD::EXTRACT_SPE_LO, dl, MVT::i32, Op0.getOperand(0)); ++ ++ return DAG.getNode(PPCISD::EXTRACT_SPE_HI, dl, MVT::i32, Op0.getOperand(0)); ++} ++ + // If this is a case we can't handle, return null and let the default + // expansion code take care of it. If we CAN select this case, and if it + // selects to a single instruction, return Op. Otherwise, if we can codegen +@@ -9584,6 +9624,8 @@ SDValue PPCTargetLowering::LowerOperatio + return LowerBSWAP(Op, DAG); + case ISD::ATOMIC_CMP_SWAP: + return LowerATOMIC_CMP_SWAP(Op, DAG); ++ case ISD::EXTRACT_ELEMENT: ++ return LowerEXTRACT_ELEMENT(Op, DAG); + } + } + +@@ -9641,6 +9683,8 @@ void PPCTargetLowering::ReplaceNodeResul + return; + Results.push_back(LowerFP_TO_INT(SDValue(N, 0), DAG, dl)); + return; ++ case ISD::BITCAST: ++ return; + } + } + +--- llvm-toolchain-7-7.0.1~+rc2.orig/lib/Target/PowerPC/PPCISelLowering.h ++++ llvm-toolchain-7-7.0.1~+rc2/lib/Target/PowerPC/PPCISelLowering.h +@@ -192,6 +192,15 @@ namespace llvm { + /// Direct move of 2 consective GPR to a VSX register. + BUILD_FP128, + ++ /// Merge 2 GPRs to a single SPE register ++ BUILD_SPE64, ++ ++ /// Extract high SPE register component ++ EXTRACT_SPE_HI, ++ ++ /// Extract low SPE register component ++ EXTRACT_SPE_LO, ++ + /// Extract a subvector from signed integer vector and convert to FP. + /// It is primarily used to convert a (widened) illegal integer vector + /// type to a legal floating point vector type. +@@ -1079,6 +1088,7 @@ namespace llvm { + SDValue lowerEH_SJLJ_SETJMP(SDValue Op, SelectionDAG &DAG) const; + SDValue lowerEH_SJLJ_LONGJMP(SDValue Op, SelectionDAG &DAG) const; + SDValue LowerBITCAST(SDValue Op, SelectionDAG &DAG) const; ++ SDValue LowerEXTRACT_ELEMENT(SDValue Op, SelectionDAG &DAG) const; + + SDValue DAGCombineExtBoolTrunc(SDNode *N, DAGCombinerInfo &DCI) const; + SDValue DAGCombineBuildVector(SDNode *N, DAGCombinerInfo &DCI) const; +--- llvm-toolchain-7-7.0.1~+rc2.orig/lib/Target/PowerPC/PPCInstrInfo.td ++++ llvm-toolchain-7-7.0.1~+rc2/lib/Target/PowerPC/PPCInstrInfo.td +@@ -225,6 +225,22 @@ def PPCbuild_fp128: SDNode<"PPCISD::BUIL + SDTCisSameAs<1,2>]>, + []>; + ++def PPCbuild_spe64: SDNode<"PPCISD::BUILD_SPE64", ++ SDTypeProfile<1, 2, ++ [SDTCisFP<0>, SDTCisSameSizeAs<1,2>, ++ SDTCisSameAs<1,2>]>, ++ []>; ++ ++def PPCextract_spe_hi : SDNode<"PPCISD::EXTRACT_SPE_HI", ++ SDTypeProfile<1, 1, ++ [SDTCisInt<0>, SDTCisFP<1>]>, ++ []>; ++ ++def PPCextract_spe_lo : SDNode<"PPCISD::EXTRACT_SPE_LO", ++ SDTypeProfile<1, 1, ++ [SDTCisInt<0>, SDTCisFP<1>]>, ++ []>; ++ + // These are target-independent nodes, but have target-specific formats. + def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_PPCCallSeqStart, + [SDNPHasChain, SDNPOutGlue]>; +--- llvm-toolchain-7-7.0.1~+rc2.orig/lib/Target/PowerPC/PPCInstrSPE.td ++++ llvm-toolchain-7-7.0.1~+rc2/lib/Target/PowerPC/PPCInstrSPE.td +@@ -512,7 +512,7 @@ def EVLWWSPLATX : EVXForm_1<792, (out + + def EVMERGEHI : EVXForm_1<556, (outs sperc:$RT), (ins sperc:$RA, sperc:$RB), + "evmergehi $RT, $RA, $RB", IIC_VecGeneral, []>; +-def EVMERGELO : EVXForm_1<557, (outs sperc:$RT), (ins sperc:$RA, sperc:$RB), ++def EVMERGELO : EVXForm_1<557, (outs sperc:$RT), (ins gprc:$RA, gprc:$RB), + "evmergelo $RT, $RA, $RB", IIC_VecGeneral, []>; + def EVMERGEHILO : EVXForm_1<558, (outs sperc:$RT), (ins sperc:$RA, sperc:$RB), + "evmergehilo $RT, $RA, $RB", IIC_VecGeneral, []>; +@@ -889,4 +889,15 @@ def : Pat<(f64 (selectcc i1:$lhs, i1:$rh + (SELECT_SPE (CRANDC $lhs, $rhs), $tval, $fval)>; + def : Pat<(f64 (selectcc i1:$lhs, i1:$rhs, f64:$tval, f64:$fval, SETNE)), + (SELECT_SPE (CRXOR $lhs, $rhs), $tval, $fval)>; ++ ++ ++def : Pat<(f64 (PPCbuild_spe64 i32:$rB, i32:$rA)), ++ (f64 (COPY_TO_REGCLASS (EVMERGELO $rA, $rB), SPERC))>; ++ ++def : Pat<(i32 (PPCextract_spe_hi f64:$rA)), ++ (i32 (EXTRACT_SUBREG (EVMERGEHI $rA, $rA), sub_32))>; ++ ++def : Pat<(i32 (PPCextract_spe_lo f64:$rA)), ++ (i32 (EXTRACT_SUBREG $rA, sub_32))>; ++ + } +--- llvm-toolchain-7-7.0.1~+rc2.orig/test/CodeGen/PowerPC/spe.ll ++++ llvm-toolchain-7-7.0.1~+rc2/test/CodeGen/PowerPC/spe.ll +@@ -472,10 +472,8 @@ entry: + ; CHECK-LABEL: test_dselect + ; CHECK: andi. + ; CHECK: bc +-; CHECK: evldd +-; CHECK: b +-; CHECK: evldd +-; CHECK: evstdd ++; CHECK: evor ++; CHECK: evmergehi + ; CHECK: blr + } + +@@ -519,7 +517,7 @@ entry: + %1 = call i32 asm sideeffect "efdctsi $0, $1", "=d,d"(double %0) + ret i32 %1 + ; CHECK-LABEL: test_dasmconst +-; CHECK: evldd ++; CHECK: evmergelo + ; CHECK: #APP + ; CHECK: efdctsi + ; CHECK: #NO_APP +@@ -541,7 +539,7 @@ entry: + %a4.addr = alloca i32*, align 4 + %a5.addr = alloca i32*, align 4 + %ptr = alloca i32*, align 4 +- %v1 = alloca [8 x i32], align 4 ++ %v1 = alloca [9 x i32], align 4 + %v2 = alloca [7 x i32], align 4 + %v3 = alloca [5 x i32], align 4 + store i32 %a1, i32* %a1.addr, align 4 +@@ -554,7 +552,7 @@ entry: + call void asm sideeffect "","~{s0},~{s3},~{s4},~{s5},~{s6},~{s7},~{s8},~{s9},~{s10},~{s11},~{s12},~{s13},~{s14},~{s15},~{s16},~{s17},~{s18},~{s19},~{s20},~{s21},~{s22},~{s23},~{s24},~{s25},~{s26},~{s27},~{s28},~{s29},~{s30},~{s31}"() nounwind + %1 = fadd double %0, 3.14159 + %2 = load i32*, i32** %ptr, align 4 +- %3 = bitcast [8 x i32]* %v1 to i8* ++ %3 = bitcast [9 x i32]* %v1 to i8* + call void @llvm.memset.p0i8.i32(i8* align 4 %3, i8 0, i32 24, i1 true) + %4 = load i32*, i32** %a5.addr, align 4 + store i32 0, i32* %4, align 4 diff --git a/debian/patches/clang-arm-default-vfp3-on-armv7a.patch b/debian/patches/clang-arm-default-vfp3-on-armv7a.patch index 7179927b..62d787fd 100644 --- a/debian/patches/clang-arm-default-vfp3-on-armv7a.patch +++ b/debian/patches/clang-arm-default-vfp3-on-armv7a.patch @@ -7,7 +7,7 @@ Index: llvm-toolchain-7-7/include/llvm/Support/ARMTargetParser.def FK_NONE, ARM::AEK_NONE) ARM_ARCH("armv7-a", ARMV7A, "7-A", "v7", ARMBuildAttrs::CPUArch::v7, - FK_NEON, ARM::AEK_DSP) -+ FK_VFPV3 /* Hard float */, ARM::AEK_DSP) ++ FK_VFPV3_D16 /* Hard float */, ARM::AEK_DSP) ARM_ARCH("armv7ve", ARMV7VE, "7VE", "v7ve", ARMBuildAttrs::CPUArch::v7, FK_NEON, (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP)) @@ -15,11 +15,13 @@ Index: llvm-toolchain-7-7/lib/Target/ARM/ARM.td =================================================================== --- llvm-toolchain-7-7.orig/lib/Target/ARM/ARM.td +++ llvm-toolchain-7-7/lib/Target/ARM/ARM.td -@@ -558,7 +558,6 @@ def ARMv6sm : Architecture<"armv6s-m", +@@ -558,7 +558,8 @@ def ARMv6sm : Architecture<"armv6s-m", FeatureStrictAlign]>; def ARMv7a : Architecture<"armv7-a", "ARMv7a", [HasV7Ops, - FeatureNEON, ++ FeatureVFP3, ++ FeatureD16, FeatureDB, FeatureDSP, FeatureAClass]>; diff --git a/debian/patches/clang-baseline-fix-i386.patch b/debian/patches/clang-baseline-fix-i386.patch new file mode 100644 index 00000000..4c7a4927 --- /dev/null +++ b/debian/patches/clang-baseline-fix-i386.patch @@ -0,0 +1,13 @@ +--- a/clang/lib/Driver/ToolChains/Arch/X86.cpp ++++ b/clang/lib/Driver/ToolChains/Arch/X86.cpp +@@ -105,8 +105,8 @@ const char *x86::getX86TargetCPU(const ArgList &Args, + case llvm::Triple::Haiku: + return "i586"; + default: +- // Fallback to p4. +- return "pentium4"; ++ // Fallback to i686. ++ return "i686"; + } + } + diff --git a/debian/patches/fix-llvm-config.diff b/debian/patches/fix-llvm-config.diff new file mode 100644 index 00000000..32feaadf --- /dev/null +++ b/debian/patches/fix-llvm-config.diff @@ -0,0 +1,15 @@ +--- llvm-toolchain-7-7~+rc3.orig/tools/llvm-config/CMakeLists.txt ++++ llvm-toolchain-7-7~+rc3/tools/llvm-config/CMakeLists.txt +@@ -32,9 +32,9 @@ + # Use configure_file to create BuildVariables.inc. + set(LLVM_SRC_ROOT ${LLVM_MAIN_SRC_DIR}) + set(LLVM_OBJ_ROOT ${LLVM_BINARY_DIR}) +-set(LLVM_CPPFLAGS "${CMAKE_CPP_FLAGS} ${CMAKE_CPP_FLAGS_${uppercase_CMAKE_BUILD_TYPE}} ${LLVM_DEFINITIONS}") +-set(LLVM_CFLAGS "${CMAKE_C_FLAGS} ${CMAKE_C_FLAGS_${uppercase_CMAKE_BUILD_TYPE}} ${LLVM_DEFINITIONS}") +-set(LLVM_CXXFLAGS "${CMAKE_CXX_FLAGS} ${CMAKE_CXX_FLAGS_${uppercase_CMAKE_BUILD_TYPE}} ${COMPILE_FLAGS} ${LLVM_DEFINITIONS}") ++set(LLVM_CPPFLAGS "${LLVM_DEFINITIONS}") ++set(LLVM_CFLAGS "${LLVM_DEFINITIONS}") ++set(LLVM_CXXFLAGS "${COMPILE_FLAGS} ${LLVM_DEFINITIONS}") + set(LLVM_BUILD_SYSTEM cmake) + set(LLVM_HAS_RTTI ${LLVM_CONFIG_HAS_RTTI}) + set(LLVM_DYLIB_VERSION "${LLVM_VERSION_MAJOR}${LLVM_VERSION_SUFFIX}") diff --git a/debian/patches/series b/debian/patches/series index 6757644a..bde9d701 100644 --- a/debian/patches/series +++ b/debian/patches/series @@ -1,65 +1,82 @@ +# Debian versions 19-clang_debian_version.patch -23-strlcpy_strlcat_warning_removed.diff -27-fix_clang_stdint.diff -26-set-correct-float-abi.diff 0003-Debian-version-info-and-bugreport.patch -scan-build-clang-path.diff -declare_clear_cache.diff clang-format-version.diff +clang-analyzer-force-version.diff + +# Disabling features +23-strlcpy_strlcat_warning_removed.diff + +27-fix_clang_stdint.diff +declare_clear_cache.diff unwind-chain-inclusion.diff -hurd-pathmax.diff -silent-gold-test.diff atomic_library_1.diff + +# Path updates python-clangpath.diff fix-clang-path-and-build.diff +0048-Set-html_static_path-_static-everywhere.patch +x32-fix-driver-search-paths.diff +symbolizer-path.diff +clang-tidy-run-bin.diff +0001-tools-clang-cmake-resolve-symlinks-in-ClangConfig.cmake.patch + # commented because of bug 903709 #force-gcc-header-obj.diff + do-not-fail-on-unexpected-pass.diff -silent-more-tests.diff disable-display-PASS-UNSUPPORTED-XFAIL.diff + +# llvm-config fix-llvm-config-obj-src-root.patch +fix-llvm-config.diff +0001-llvm-cmake-resolve-symlinks-in-LLVMConfig.cmake.patch + +# Lib names 0044-soname.diff lldb-soname.diff lldb-libname.diff -hurd-EIEIO-undef.diff +openmp-soname.diff + +# Disable some tests +silent-gold-test.diff +silent-more-tests.diff silent-MCJIIT-tests.diff -clang-analyzer-force-version.diff -install-scan-build-py.diff -scan-view-fix-path.diff -mips-fpxx-enable.diff -0001-llvm-cmake-resolve-symlinks-in-LLVMConfig.cmake.patch -0001-tools-clang-cmake-resolve-symlinks-in-ClangConfig.cmake.patch -lldb-link-atomic-cmake.patch -disable-source-interleave.diff silent-gold-utils.diff -disable-llvm-symbolizer-test.diff -#fix-lldb-server-build -clang-tidy-run-bin.diff -#bug-30342.diff -fix-scan-view-path.diff -#clang-fix-cmpxchg8-detection-on-i386.patch -lldb-addversion-suffix-to-llvm-server-exec.patch -lldb-missing-install.diff silent-test-failing-codeverage.diff -disable-path-test-failing.diff silent-amd-tet.diff -disable-error-xray.diff -lldb-disable-swig-error.diff silent-test-macho.diff silent-llvm-isel-fuzzer.diff -test-keep-alive.diff remove-test-freezing.diff -0048-Set-html_static_path-_static-everywhere.patch -0049-Use-Debian-provided-MathJax-everywhere.patch -impl-path-hurd.diff +disable-llvm-symbolizer-test.diff +disable-path-test-failing.diff +disable-source-interleave.diff + +# Decrease the freq for the keep alive +test-keep-alive.diff + +# scan-build +scan-build-clang-path.diff +install-scan-build-py.diff +scan-view-fix-path.diff +fix-scan-view-path.diff +scan-build-clang-X.diff + +# lldb +lldb-link-atomic-cmake.patch +lldb-addversion-suffix-to-llvm-server-exec.patch +lldb-missing-install.diff +lldb-disable-swig-error.diff + +# Fix arch issue +disable-error-xray.diff # OpenMP - openmp-check-execstack.diff -openmp-soname.diff openmp-mips-affinity.patch -# libcxx +bootstrap-with-openmp-version-export-missing.diff +# libcxx libcxxabi-test-don-t-fail-extended-long-double.patch libcxx-test-fix-lockfree-test-for-i386.patch libcxxabi-arm-ehabi-fix.patch @@ -68,18 +85,52 @@ libcxx-silent-test-libcxx.diff libcxx-silent-failure-ppc64el.diff libcxx-silent-failure-arm64.diff +# Rust on ppc +D51108-rust-powerpc.diff + +# Change default optims +mips-fpxx-enable.diff +26-set-correct-float-abi.diff +clang-baseline-fix-i386.patch disable-sse2-old-x86.diff - -bootstrap-fix-include-next.diff -bootstrap-with-openmp-version-export-missing.diff - -clangd-atomic-cmake.patch -symbolizer-path.diff -remove-apple-clang-manpage.diff clang-arm-default-vfp3-on-armv7a.patch + +# For the boostrap +bootstrap-fix-include-next.diff +clangd-atomic-cmake.patch +pr39427-misscompile.diff + +# Rustc +rustc-aarch64-test-failure.diff + +# Fix docs +remove-apple-clang-manpage.diff +0049-Use-Debian-provided-MathJax-everywhere.patch + +# reproducible reproducible-pch.diff # Hurd port -#D54379-hurd-triple-clang.diff +hurd-pathmax.diff +hurd-EIEIO-undef.diff +impl-path-hurd.diff +hurd-lib_Support_Unix_Path.inc.diff +hurd-tools_llvm-shlib_CMakeLists.txt.diff +D54079-hurd-openmp.diff +D54338-hurd-libcxx-threads-build.diff +D54339-hurd-libcxx-threads-detection.diff +D54378-hurd-triple.diff +D54379-hurd-triple-clang.diff D54677-hurd-path_max.diff -#hurd-cxx-paths.diff +hurd-cxx-paths.diff +D53557-hurd-self-exe-realpath.diff + +# mips +strip-ignore-deterministic-archives.diff + +# powerpcspe +powerpcspe-add-missing-include-path.diff +D49754-powerpcspe-clang.diff +D54409-powerpcspe-register-spilling.diff +D54584-powerpcspe-double-parameter.diff + diff --git a/debian/patches/strip-ignore-deterministic-archives.diff b/debian/patches/strip-ignore-deterministic-archives.diff new file mode 100644 index 00000000..10b05851 --- /dev/null +++ b/debian/patches/strip-ignore-deterministic-archives.diff @@ -0,0 +1,10 @@ +Index: llvm-toolchain-7-7.0.1~+rc2/tools/llvm-objcopy/StripOpts.td +=================================================================== +--- llvm-toolchain-7-7.0.1~+rc2.orig/tools/llvm-objcopy/StripOpts.td ++++ llvm-toolchain-7-7.0.1~+rc2/tools/llvm-objcopy/StripOpts.td +@@ -47,3 +47,5 @@ def x : Flag<["-"], "x">, + + def strip_unneeded : Flag<["-", "--"], "strip-unneeded">, + HelpText<"Remove all symbols not needed by relocations">; ++ ++def deterministic : Flag<["--"], "enable-deterministic-archives">; diff --git a/debian/rules b/debian/rules index 3d9720cb..d444d763 100755 --- a/debian/rules +++ b/debian/rules @@ -681,8 +681,14 @@ override_dh_installman: override_dh_strip: + : # Workaround some issues with stripping by using llvm's + if test ! -f $(CURDIR)/strip; then \ + ln -s $(CURDIR)/debian/llvm-$(LLVM_VERSION)/usr/lib/llvm-$(LLVM_VERSION)/bin/llvm-strip $(CURDIR)/strip; \ + fi : # running out of diskspace on the buildds find $(TARGET_BUILD) -name '*.o' -o -name '*.a' -type f | xargs -r rm -f + # strip args in case we want to use llvm-strip + #PATH=$(CURDIR)/:$$PATH LD_LIBRARY_PATH=$(DEB_INST)/usr/lib/llvm-$(LLVM_VERSION)/lib/ ifeq (0, $(strip $(shell dpkg --compare-versions $(DH_VERSION) ge 9.20160114; echo $$?))) : # If we don't have the right version of debhelper, don't run the option dh_strip -p libclang$(SONAME_EXT)-$(LLVM_VERSION) --dbgsym-migration='libclang$(SONAME_EXT)-$(LLVM_VERSION)-dbg (<< 1:8~svn327768-1~)' @@ -691,7 +697,7 @@ ifeq (0, $(strip $(shell dpkg --compare-versions $(DH_VERSION) ge 9.20160114; ec dh_strip -p libomp$(SONAME_OPENMP)-$(LLVM_VERSION) --dbgsym-migration='libomp$(SONAME_OPENMP)-$(LLVM_VERSION)-dbg (<< 1:8~svn327768-1~)' endif # ifeq (${LLD_ENABLE},yes) -# dh_strip -p liblld-$(LLVM_VERSION) --dbg-package=liblld-$(LLVM_VERSION)-dbg +# PATH=$(CURDIR)/:$$PATH dh_strip -p liblld-$(LLVM_VERSION) --dbg-package=liblld-$(LLVM_VERSION)-dbg # endif ifeq ($(shell dpkg --compare-versions $(shell dpkg-query -W -f '$${Version}' binutils) ge 2.28 ; echo $$?),0) rm -f $(CURDIR)/libc++-$(LLVM_VERSION)-dev/usr/lib/llvm-$(LLVM_VERSION)/lib/*/operations.cpp.o @@ -700,7 +706,8 @@ ifeq ($(shell dpkg --compare-versions $(shell dpkg-query -W -f '$${Version}' bin else dh_strip -a -v endif - + : # Remove the workaround + rm $(CURDIR)/strip override_dh_install: # cp $(TARGET_BUILD)/lib/libLLVM-$(LLVM_VERSION).so $(DEB_INST)/usr/lib/llvm-$(LLVM_VERSION)/lib/libLLVM-$(LLVM_VERSION).so.$(SONAME_EXT)