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Cherry pick an upstream issue with x86 mentionned here: https://lists.llvm.org/pipermail/llvm-dev/2018-August/125111.html "A very subtle miscompile due to a bug in EFLAGS copy lowering for X86 was fixed. Chandler suggests maintainers of out-of-tree branches using the X86 backend may want to cherry-pick this fix." https://reviews.llvm.org/rL338481
This commit is contained in:
Sylvestre Ledru
parent
79ca353790
commit
8337dca806
6
debian/changelog
vendored
6
debian/changelog
vendored
@ -7,6 +7,12 @@ llvm-toolchain-6.0 (1:6.0.1-7) unstable; urgency=medium
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See upstream bug 38707 (Closes: #907622)
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* Fix an optimization issues (Closes: #907649)
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See upstream bug 38786
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* Cherry pick an upstream issue with x86 mentionned here:
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https://lists.llvm.org/pipermail/llvm-dev/2018-August/125111.html
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"A very subtle miscompile due to a bug in EFLAGS copy lowering
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for X86 was fixed. Chandler suggests maintainers of out-of-tree
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branches using the X86 backend may want to cherry-pick this fix."
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https://reviews.llvm.org/rL338481
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-- Sylvestre Ledru <sylvestre@debian.org> Thu, 06 Sep 2018 20:51:24 +0200
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153
debian/patches/rL338481-cherry-pick-really-subtle-miscompile.diff
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Normal file
153
debian/patches/rL338481-cherry-pick-really-subtle-miscompile.diff
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@ -0,0 +1,153 @@
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Index: llvm-toolchain-6.0-6.0.1/test/CodeGen/X86/flags-copy-lowering.mir
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===================================================================
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--- llvm-toolchain-6.0-6.0.1.orig/test/CodeGen/X86/flags-copy-lowering.mir
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+++ llvm-toolchain-6.0-6.0.1/test/CodeGen/X86/flags-copy-lowering.mir
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@@ -72,6 +72,18 @@
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call void @foo()
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ret void
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}
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+
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+ define i32 @test_existing_setcc(i64 %a, i64 %b) {
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+ entry:
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+ call void @foo()
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+ ret i32 0
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+ }
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+
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+ define i32 @test_existing_setcc_memory(i64 %a, i64 %b) {
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+ entry:
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+ call void @foo()
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+ ret i32 0
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+ }
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...
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---
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name: test_branch
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@@ -553,3 +565,110 @@ body: |
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RET 0
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...
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+---
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+name: test_existing_setcc
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+# CHECK-LABEL: name: test_existing_setcc
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+liveins:
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+ - { reg: '$rdi', virtual-reg: '%0' }
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+ - { reg: '$rsi', virtual-reg: '%1' }
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+body: |
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+ bb.0:
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+ successors: %bb.1, %bb.2, %bb.3
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+ liveins: $rdi, $rsi
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+
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+ %0:gr64 = COPY $rdi
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+ %1:gr64 = COPY $rsi
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+ CMP64rr %0, %1, implicit-def $eflags
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+ %2:gr8 = SETAr implicit $eflags
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+ %3:gr8 = SETAEr implicit $eflags
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+ %4:gr64 = COPY $eflags
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+ ; CHECK: CMP64rr %0, %1, implicit-def $eflags
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+ ; CHECK-NEXT: %[[A_REG:[^:]*]]:gr8 = SETAr implicit $eflags
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+ ; CHECK-NEXT: %[[AE_REG:[^:]*]]:gr8 = SETAEr implicit $eflags
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+ ; CHECK-NOT: COPY{{( killed)?}} $eflags
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+
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+ ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
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+ CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, implicit-def $rsp, implicit-def $ssp, implicit-def $eax
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+ ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
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+
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+ $eflags = COPY %4
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+ JA_1 %bb.1, implicit $eflags
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+ JB_1 %bb.2, implicit $eflags
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+ JMP_1 %bb.3
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+ ; CHECK-NOT: $eflags =
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+ ;
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+ ; CHECK: TEST8rr %[[A_REG]], %[[A_REG]], implicit-def $eflags
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+ ; CHECK-NEXT: JNE_1 %bb.1, implicit killed $eflags
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+ ; CHECK-SAME: {{$[[:space:]]}}
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+ ; CHECK-NEXT: bb.4:
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+ ; CHECK-NEXT: successors: {{.*$}}
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+ ; CHECK-SAME: {{$[[:space:]]}}
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+ ; CHECK-NEXT: TEST8rr %[[AE_REG]], %[[AE_REG]], implicit-def $eflags
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+ ; CHECK-NEXT: JE_1 %bb.2, implicit killed $eflags
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+ ; CHECK-NEXT: JMP_1 %bb.3
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+
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+ bb.1:
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+ %5:gr32 = MOV32ri64 42
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+ $eax = COPY %5
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+ RET 0, $eax
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+
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+ bb.2:
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+ %6:gr32 = MOV32ri64 43
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+ $eax = COPY %6
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+ RET 0, $eax
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+
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+ bb.3:
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+ %7:gr32 = MOV32r0 implicit-def dead $eflags
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+ $eax = COPY %7
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+ RET 0, $eax
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+
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+...
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+---
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+name: test_existing_setcc_memory
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+# CHECK-LABEL: name: test_existing_setcc_memory
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+liveins:
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+ - { reg: '$rdi', virtual-reg: '%0' }
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+ - { reg: '$rsi', virtual-reg: '%1' }
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+body: |
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+ bb.0:
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+ successors: %bb.1, %bb.2
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+ liveins: $rdi, $rsi
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+
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+ %0:gr64 = COPY $rdi
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+ %1:gr64 = COPY $rsi
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+ CMP64rr %0, %1, implicit-def $eflags
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+ SETEm %0, 1, $noreg, -16, $noreg, implicit $eflags
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+ %2:gr64 = COPY $eflags
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+ ; CHECK: CMP64rr %0, %1, implicit-def $eflags
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+ ; We cannot reuse this SETE because it stores the flag directly to memory,
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+ ; so we have two SETEs here. FIXME: It'd be great if something could fold
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+ ; these automatically. If not, maybe we want to unfold SETcc instructions
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+ ; writing to memory so we can reuse them.
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+ ; CHECK-NEXT: SETEm {{.*}} implicit $eflags
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+ ; CHECK-NEXT: %[[E_REG:[^:]*]]:gr8 = SETEr implicit $eflags
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+ ; CHECK-NOT: COPY{{( killed)?}} $eflags
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+
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+ ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
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+ CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, implicit-def $rsp, implicit-def $ssp, implicit-def $eax
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+ ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
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+
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+ $eflags = COPY %2
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+ JE_1 %bb.1, implicit $eflags
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+ JMP_1 %bb.2
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+ ; CHECK-NOT: $eflags =
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+ ;
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+ ; CHECK: TEST8rr %[[E_REG]], %[[E_REG]], implicit-def $eflags
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+ ; CHECK-NEXT: JNE_1 %bb.1, implicit killed $eflags
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+ ; CHECK-NEXT: JMP_1 %bb.2
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+
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+ bb.1:
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+ %3:gr32 = MOV32ri64 42
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+ $eax = COPY %3
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+ RET 0, $eax
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+
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+ bb.2:
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+ %4:gr32 = MOV32ri64 43
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+ $eax = COPY %4
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+ RET 0, $eax
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+
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+...
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Index: llvm-toolchain-6.0-6.0.1/lib/Target/X86/X86FlagsCopyLowering.cpp
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===================================================================
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--- llvm-toolchain-6.0-6.0.1.orig/lib/Target/X86/X86FlagsCopyLowering.cpp
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+++ llvm-toolchain-6.0-6.0.1/lib/Target/X86/X86FlagsCopyLowering.cpp
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@@ -608,9 +608,12 @@ X86FlagsCopyLoweringPass::collectCondsIn
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for (MachineInstr &MI : llvm::reverse(
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llvm::make_range(MBB.instr_begin(), CopyDefI.getIterator()))) {
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X86::CondCode Cond = X86::getCondFromSETOpc(MI.getOpcode());
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- if (Cond != X86::COND_INVALID && MI.getOperand(0).isReg() &&
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- TRI->isVirtualRegister(MI.getOperand(0).getReg()))
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+ if (Cond != X86::COND_INVALID && !MI.mayStore() && MI.getOperand(0).isReg() &&
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+ TRI->isVirtualRegister(MI.getOperand(0).getReg())) {
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+ assert(MI.getOperand(0).isDef() &&
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+ "A non-storing SETcc should always define a register!");
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CondRegs[Cond] = MI.getOperand(0).getReg();
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+ }
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// Stop scanning when we see the first definition of the EFLAGS as prior to
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// this we would potentially capture the wrong flag state.
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1
debian/patches/series
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1
debian/patches/series
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@ -64,3 +64,4 @@ D51108-rust-powerpc.diff
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pr38663-pgo-lto-crash.patch
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D51335-alignment-issue.diff
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D51639-optim-issue.diff
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rL338481-cherry-pick-really-subtle-miscompile.diff
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