* debian/patches/r600-snapshot.diff: Move backports into individual patches.

* debian/patches/r600-snapshot.diff: Update to mesa-9.1 git tag.
  (Closes: #703671, #697356)

debian/changelog

@@ -7,6 +7,9 @@ llvm-toolchain-3.2 (1:3.2repack-1~exp4) UNRELEASED; urgency=low
     See: 31-powerpcspe.diff
   * Fix the path detection of scan-build (Closes: #698352)
     See: 32-scan-build-path.diff
+  * debian/patches/r600-snapshot.diff: Move backports into individual patches.
+  * debian/patches/r600-snapshot.diff: Update to mesa-9.1 git tag.
+    (Closes: #703671, #697356)
 
  -- Sylvestre Ledru <sylvestre@debian.org>  Thu, 14 Mar 2013 17:47:12 +0100
 

debian/patches/0101-LegalizeDAG-Allow-type-promotion-for-scalar-stores.patch

@@ -0,0 +1,32 @@
+From 7fd12aa7dac937573ea8a48fbe646b334ece4b74 Mon Sep 17 00:00:00 2001
+From: Tom Stellard <thomas.stellard@amd.com>
+Date: Mon, 10 Dec 2012 21:41:54 +0000
+Subject: [PATCH 1/4] LegalizeDAG: Allow type promotion for scalar stores
+
+git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169772 91177308-0d34-0410-b5e6-96231b3b80d8
+(cherry picked from commit 8b7f16e9719a64973e3b4d35e122222c26839c44)
+---
+ lib/CodeGen/SelectionDAG/LegalizeDAG.cpp |    7 ++++---
+ 1 fil ändrad, 4 tillägg(+), 3 borttagningar(-)
+
+diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+index abf40b7..9946694 100644
+--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
++++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+@@ -731,9 +731,10 @@ void SelectionDAGLegalize::LegalizeStoreOps(SDNode *Node) {
+           return;
+         }
+         case TargetLowering::Promote: {
+-          assert(VT.isVector() && "Unknown legal promote case!");
+-          Value = DAG.getNode(ISD::BITCAST, dl,
+-                             TLI.getTypeToPromoteTo(ISD::STORE, VT), Value);
++          EVT NVT = TLI.getTypeToPromoteTo(ISD::STORE, VT);
++          assert(NVT.getSizeInBits() == VT.getSizeInBits() &&
++                 "Can only promote stores to same size type");
++          Value = DAG.getNode(ISD::BITCAST, dl, NVT, Value);
+           SDValue Result =
+             DAG.getStore(Chain, dl, Value, Ptr,
+                          ST->getPointerInfo(), isVolatile,
+-- 
+1.7.10.4
+

debian/patches/0102-LegalizeDAG-Allow-type-promotion-of-scalar-loads.patch

@@ -0,0 +1,31 @@
+From 0530926051350bd36e1ea974066c5a14ae0fe202 Mon Sep 17 00:00:00 2001
+From: Tom Stellard <thomas.stellard@amd.com>
+Date: Mon, 10 Dec 2012 21:41:58 +0000
+Subject: [PATCH 2/4] LegalizeDAG: Allow type promotion of scalar loads
+
+git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169773 91177308-0d34-0410-b5e6-96231b3b80d8
+(cherry picked from commit f45d11b56bffeaec94291f330dc9f7f7aae5a741)
+---
+ lib/CodeGen/SelectionDAG/LegalizeDAG.cpp |    5 ++---
+ 1 fil ändrad, 2 tillägg(+), 3 borttagningar(-)
+
+diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+index 9946694..2596f00 100644
+--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
++++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+@@ -890,10 +890,9 @@ void SelectionDAGLegalize::LegalizeLoadOps(SDNode *Node) {
+       break;
+     }
+     case TargetLowering::Promote: {
+-      // Only promote a load of vector type to another.
+-      assert(VT.isVector() && "Cannot promote this load!");
+-      // Change base type to a different vector type.
+       EVT NVT = TLI.getTypeToPromoteTo(Node->getOpcode(), VT);
++      assert(NVT.getSizeInBits() == VT.getSizeInBits() &&
++             "Can only promote loads to same size type");
+ 
+       SDValue Res = DAG.getLoad(NVT, dl, Chain, Ptr, LD->getPointerInfo(),
+                          LD->isVolatile(), LD->isNonTemporal(),
+-- 
+1.7.10.4
+

debian/patches/0103-DAGCombiner-Avoid-generating-illegal-vector-INT_TO_F.patch

@@ -0,0 +1,70 @@
+From 1d10f5a4c953104cf44c7c3e5927aec536b734f4 Mon Sep 17 00:00:00 2001
+From: Tom Stellard <thomas.stellard@amd.com>
+Date: Wed, 2 Jan 2013 22:13:01 +0000
+Subject: [PATCH 3/4] DAGCombiner: Avoid generating illegal vector INT_TO_FP
+ nodes
+
+DAGCombiner::reduceBuildVecConvertToConvertBuildVec() was making two
+mistakes:
+
+1. It was checking the legality of scalar INT_TO_FP nodes and then generating
+vector nodes.
+
+2. It was passing the result value type to
+TargetLoweringInfo::getOperationAction() when it should have been
+passing the value type of the first operand.
+
+git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171420 91177308-0d34-0410-b5e6-96231b3b80d8
+(cherry picked from commit d40758b24ebab5777131533d9369e707fc852594)
+
+Conflicts:
+	test/CodeGen/R600/dagcombiner-bug-illegal-vec4-int-to-fp.ll
+	test/CodeGen/R600/vec4-expand.ll
+---
+ lib/CodeGen/SelectionDAG/DAGCombiner.cpp |    9 +++++----
+ test/CodeGen/X86/cvtv2f32.ll             |    4 ++++
+ 2 filer ändrade, 9 tillägg(+), 4 borttagningar(-)
+
+diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+index 37d7731..d0ca5c0 100644
+--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
++++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+@@ -8514,11 +8514,8 @@ SDValue DAGCombiner::reduceBuildVecConvertToConvertBuildVec(SDNode *N) {
+     if (Opcode == ISD::DELETED_NODE &&
+         (Opc == ISD::UINT_TO_FP || Opc == ISD::SINT_TO_FP)) {
+       Opcode = Opc;
+-      // If not supported by target, bail out.
+-      if (TLI.getOperationAction(Opcode, VT) != TargetLowering::Legal &&
+-          TLI.getOperationAction(Opcode, VT) != TargetLowering::Custom)
+-        return SDValue();
+     }
++
+     if (Opc != Opcode)
+       return SDValue();
+ 
+@@ -8543,6 +8540,10 @@ SDValue DAGCombiner::reduceBuildVecConvertToConvertBuildVec(SDNode *N) {
+   assert(SrcVT != MVT::Other && "Cannot determine source type!");
+ 
+   EVT NVT = EVT::getVectorVT(*DAG.getContext(), SrcVT, NumInScalars);
++
++  if (!TLI.isOperationLegalOrCustom(Opcode, NVT))
++    return SDValue();
++
+   SmallVector<SDValue, 8> Opnds;
+   for (unsigned i = 0; i != NumInScalars; ++i) {
+     SDValue In = N->getOperand(i);
+diff --git a/test/CodeGen/X86/cvtv2f32.ll b/test/CodeGen/X86/cvtv2f32.ll
+index 466b096..d11bb9e 100644
+--- a/test/CodeGen/X86/cvtv2f32.ll
++++ b/test/CodeGen/X86/cvtv2f32.ll
+@@ -1,3 +1,7 @@
++; A bug fix in the DAGCombiner made this test fail, so marking as xfail
++; until this can be investigated further.
++; XFAIL: *
++
+ ; RUN: llc < %s -mtriple=i686-linux-pc -mcpu=corei7 | FileCheck %s
+ 
+ define <2 x float> @foo(i32 %x, i32 %y, <2 x float> %v) {
+-- 
+1.7.10.4
+

debian/patches/series

@@ -30,3 +30,7 @@ polly-c++0x.diff
 declare_clear_cache.diff
 #r600-snapshot.diff
 31-powerpcspe.diff
+0101-LegalizeDAG-Allow-type-promotion-for-scalar-stores.patch
+0102-LegalizeDAG-Allow-type-promotion-of-scalar-loads.patch
+0103-DAGCombiner-Avoid-generating-illegal-vector-INT_TO_F.patch
+