From b1c48f4bb44936e7915e5aa86f098f5e0809aba5 Mon Sep 17 00:00:00 2001 From: Sylvestre Ledru Date: Tue, 31 Mar 2020 23:46:41 +0200 Subject: [PATCH 01/21] fix more typos --- debian/changelog | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/debian/changelog b/debian/changelog index eb1bcd3a..e23cf936 100644 --- a/debian/changelog +++ b/debian/changelog @@ -146,7 +146,7 @@ llvm-toolchain-snapshot (1:10~+20191229111838+6991d5728f1-1~exp1) experimental; llvm-toolchain-snapshot (1:10~+201911120943210600592dd459242-1~exp1) experimental; urgency=medium * Repack to move to git - * Change the versionning scheme to git: + * Change the versioning scheme to git: Infos of the last commit - ~+ (this syntax is to make sure that this version > ~svn) - date @@ -280,7 +280,7 @@ llvm-toolchain-9 (1:9.0.1-11) unstable; urgency=medium (closes: #955144) And disable thin lto on all archs It needs gcc-8 after after 8 will reject the -flto=thin arg - And BOOTSTRAP_LLVM_ENABLE_LTO wil generate .so with llvm IR instead + And BOOTSTRAP_LLVM_ENABLE_LTO will generate .so with llvm IR instead of native code -- Sylvestre Ledru Tue, 31 Mar 2020 21:11:56 +0200 From c471c172d421bd2cfe93b1aef7a48fa034a336fa Mon Sep 17 00:00:00 2001 From: Sylvestre Ledru Date: Tue, 31 Mar 2020 23:47:27 +0200 Subject: [PATCH 02/21] more typos --- debian/rules | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/debian/rules b/debian/rules index d901e4d9..35a57707 100755 --- a/debian/rules +++ b/debian/rules @@ -738,7 +738,7 @@ ifeq ($(shell dpkg --compare-versions $(shell dpkg-query -W -f '$${Version}' bin ls -al $(CURDIR)/debian/.debhelper/*/dbgsym-root/usr/lib/debug/.build-id/*/*|| true : # On some old version of Debian (stretch) and Ubuntu, Rules-Requires-Root isn't supported : # Sometime, it fails because of chown: changing ownership of 'debian/.debhelper/clang-7/dbgsym-root/usr/lib/debug/.build-id/37/ba506ae9d2f82219bf5c552f7c09853052b2b0.debug': Operation not permitted - : # Therefor, continue when we encounter an error + : # Therefore, continue when we encounter an error PATH=$(CURDIR)/:$$PATH LD_LIBRARY_PATH=$(DEB_INST)/usr/lib/llvm-$(LLVM_VERSION)/lib/:/usr/lib/*/libfakeroot dh_strip -a -v || true : # Remove the workaround rm $(CURDIR)/strip From 281e4e2141a22a837103132b8757efe37fbe727e Mon Sep 17 00:00:00 2001 From: Gianfranco Costamagna Date: Thu, 2 Apr 2020 16:47:34 +0200 Subject: [PATCH 03/21] Add Ubuntu patches, upload to sid --- debian/changelog | 2 + debian/patches/D76596.diff | 1303 ++++++++++++++++++++++++++++++++++++ debian/patches/series | 6 +- 3 files changed, 1310 insertions(+), 1 deletion(-) create mode 100644 debian/patches/D76596.diff diff --git a/debian/changelog b/debian/changelog index e23cf936..4ddcb4c0 100644 --- a/debian/changelog +++ b/debian/changelog @@ -3,6 +3,8 @@ llvm-toolchain-10 (1:10.0.0-2) UNRELEASED; urgency=medium [ Dimitri John Ledkov ] * s390x: set default abi to z196 for debian, and z13 for ubuntu. LP: #1864226 + [ Matthias Klose ] + * Apply D76596.diff, proposed backport from the trunk. LP: #1867173. -- Gianfranco Costamagna Fri, 27 Mar 2020 05:16:28 +0100 diff --git a/debian/patches/D76596.diff b/debian/patches/D76596.diff new file mode 100644 index 00000000..0f25439e --- /dev/null +++ b/debian/patches/D76596.diff @@ -0,0 +1,1303 @@ +diff --git a/llvm/include/llvm/Analysis/ValueLattice.h b/llvm/include/llvm/Analysis/ValueLattice.h +--- a/llvm/include/llvm/Analysis/ValueLattice.h ++++ b/llvm/include/llvm/Analysis/ValueLattice.h +@@ -29,7 +29,12 @@ + /// producing instruction is dead. Caution: We use this as the starting + /// state in our local meet rules. In this usage, it's taken to mean + /// "nothing known yet". +- undefined, ++ unknown, ++ ++ /// This Value is an UndefValue constant or produces undef. Undefined values ++ /// can be merged with constants (or single element constant ranges), ++ /// assuming all uses of the result will be replaced. ++ undef, + + /// This Value has a specific constant value. (For constant integers, + /// constantrange is used instead. Integer typed constantexprs can appear +@@ -60,14 +65,15 @@ + + public: + // Const and Range are initialized on-demand. +- ValueLatticeElement() : Tag(undefined) {} ++ ValueLatticeElement() : Tag(unknown) {} + + /// Custom destructor to ensure Range is properly destroyed, when the object + /// is deallocated. + ~ValueLatticeElement() { + switch (Tag) { + case overdefined: +- case undefined: ++ case unknown: ++ case undef: + case constant: + case notconstant: + break; +@@ -79,7 +85,7 @@ + + /// Custom copy constructor, to ensure Range gets initialized when + /// copying a constant range lattice element. +- ValueLatticeElement(const ValueLatticeElement &Other) : Tag(undefined) { ++ ValueLatticeElement(const ValueLatticeElement &Other) : Tag(unknown) { + *this = Other; + } + +@@ -109,7 +115,8 @@ + ConstVal = Other.ConstVal; + break; + case overdefined: +- case undefined: ++ case unknown: ++ case undef: + break; + } + Tag = Other.Tag; +@@ -118,14 +125,16 @@ + + static ValueLatticeElement get(Constant *C) { + ValueLatticeElement Res; +- if (!isa(C)) ++ if (isa(C)) ++ Res.markUndef(); ++ else + Res.markConstant(C); + return Res; + } + static ValueLatticeElement getNot(Constant *C) { + ValueLatticeElement Res; +- if (!isa(C)) +- Res.markNotConstant(C); ++ assert(!isa(C) && "!= undef is not supported"); ++ Res.markNotConstant(C); + return Res; + } + static ValueLatticeElement getRange(ConstantRange CR) { +@@ -139,7 +148,9 @@ + return Res; + } + +- bool isUndefined() const { return Tag == undefined; } ++ bool isUndef() const { return Tag == undef; } ++ bool isUnknown() const { return Tag == unknown; } ++ bool isUnknownOrUndef() const { return Tag == unknown || Tag == undef; } + bool isConstant() const { return Tag == constant; } + bool isNotConstant() const { return Tag == notconstant; } + bool isConstantRange() const { return Tag == constantrange; } +@@ -170,89 +181,123 @@ + return None; + } + +-private: +- void markOverdefined() { ++ bool markOverdefined() { + if (isOverdefined()) +- return; ++ return false; + if (isConstant() || isNotConstant()) + ConstVal = nullptr; + if (isConstantRange()) + Range.~ConstantRange(); + Tag = overdefined; ++ return true; + } + +- void markConstant(Constant *V) { +- assert(V && "Marking constant with NULL"); +- if (ConstantInt *CI = dyn_cast(V)) { +- markConstantRange(ConstantRange(CI->getValue())); +- return; +- } ++ bool markUndef() { ++ if (isUndef()) ++ return false; ++ ++ assert(isUnknown()); ++ Tag = undef; ++ return true; ++ } ++ ++ bool markConstant(Constant *V) { + if (isa(V)) +- return; ++ return markUndef(); + +- assert((!isConstant() || getConstant() == V) && +- "Marking constant with different value"); +- assert(isUndefined()); ++ if (isConstant()) { ++ assert(getConstant() == V && "Marking constant with different value"); ++ return false; ++ } ++ ++ if (ConstantInt *CI = dyn_cast(V)) ++ return markConstantRange(ConstantRange(CI->getValue())); ++ ++ assert(isUnknown() || isUndef()); + Tag = constant; + ConstVal = V; ++ return true; + } + +- void markNotConstant(Constant *V) { ++ bool markNotConstant(Constant *V) { + assert(V && "Marking constant with NULL"); +- if (ConstantInt *CI = dyn_cast(V)) { +- markConstantRange(ConstantRange(CI->getValue() + 1, CI->getValue())); +- return; +- } ++ if (ConstantInt *CI = dyn_cast(V)) ++ return markConstantRange( ++ ConstantRange(CI->getValue() + 1, CI->getValue())); ++ + if (isa(V)) +- return; ++ return false; + +- assert((!isConstant() || getConstant() != V) && +- "Marking constant !constant with same value"); +- assert((!isNotConstant() || getNotConstant() == V) && +- "Marking !constant with different value"); +- assert(isUndefined() || isConstant()); ++ if (isNotConstant()) { ++ assert(getNotConstant() == V && "Marking !constant with different value"); ++ return false; ++ } ++ ++ assert(isUnknown()); + Tag = notconstant; + ConstVal = V; ++ return true; + } + +- void markConstantRange(ConstantRange NewR) { ++ /// Mark the object as constant range with \p NewR. If the object is already a ++ /// constant range, nothing changes if the existing range is equal to \p ++ /// NewR. Otherwise \p NewR must be a superset of the existing range or the ++ /// object must be undef. ++ bool markConstantRange(ConstantRange NewR) { + if (isConstantRange()) { ++ if (getConstantRange() == NewR) ++ return false; ++ + if (NewR.isEmptySet()) +- markOverdefined(); +- else { +- Range = std::move(NewR); +- } +- return; ++ return markOverdefined(); ++ ++ assert(NewR.contains(getConstantRange()) && ++ "Existing range must be a subset of NewR"); ++ Range = std::move(NewR); ++ return true; + } + +- assert(isUndefined()); ++ assert(isUnknown() || isUndef()); + if (NewR.isEmptySet()) +- markOverdefined(); +- else { +- Tag = constantrange; +- new (&Range) ConstantRange(std::move(NewR)); +- } ++ return markOverdefined(); ++ ++ Tag = constantrange; ++ new (&Range) ConstantRange(std::move(NewR)); ++ return true; + } + +-public: + /// Updates this object to approximate both this object and RHS. Returns + /// true if this object has been changed. + bool mergeIn(const ValueLatticeElement &RHS, const DataLayout &DL) { +- if (RHS.isUndefined() || isOverdefined()) ++ if (RHS.isUnknown() || isOverdefined()) + return false; + if (RHS.isOverdefined()) { + markOverdefined(); + return true; + } + +- if (isUndefined()) { ++ if (isUndef()) { ++ assert(!RHS.isUnknown()); ++ if (RHS.isUndef()) ++ return false; ++ if (RHS.isConstant()) ++ return markConstant(RHS.getConstant()); ++ if (RHS.isConstantRange() && RHS.getConstantRange().isSingleElement()) ++ return markConstantRange(RHS.getConstantRange()); ++ return markOverdefined(); ++ } ++ ++ if (isUnknown()) { ++ assert(!RHS.isUnknown() && "Unknow RHS should be handled earlier"); + *this = RHS; +- return !RHS.isUndefined(); ++ return true; + } + + if (isConstant()) { + if (RHS.isConstant() && getConstant() == RHS.getConstant()) + return false; ++ if (RHS.isUndef()) ++ return false; + markOverdefined(); + return true; + } +@@ -265,6 +310,9 @@ + } + + assert(isConstantRange() && "New ValueLattice type?"); ++ if (RHS.isUndef() && getConstantRange().isSingleElement()) ++ return false; ++ + if (!RHS.isConstantRange()) { + // We can get here if we've encountered a constantexpr of integer type + // and merge it with a constantrange. +@@ -273,18 +321,11 @@ + } + ConstantRange NewR = getConstantRange().unionWith(RHS.getConstantRange()); + if (NewR.isFullSet()) +- markOverdefined(); ++ return markOverdefined(); + else if (NewR == getConstantRange()) + return false; + else +- markConstantRange(std::move(NewR)); +- return true; +- } +- +- ConstantInt *getConstantInt() const { +- assert(isConstant() && isa(getConstant()) && +- "No integer constant"); +- return cast(getConstant()); ++ return markConstantRange(std::move(NewR)); + } + + /// Compares this symbolic value with Other using Pred and returns either +@@ -292,7 +333,7 @@ + /// evaluated. + Constant *getCompare(CmpInst::Predicate Pred, Type *Ty, + const ValueLatticeElement &Other) const { +- if (isUndefined() || Other.isUndefined()) ++ if (isUnknownOrUndef() || Other.isUnknownOrUndef()) + return UndefValue::get(Ty); + + if (isConstant() && Other.isConstant()) +diff --git a/llvm/lib/Analysis/LazyValueInfo.cpp b/llvm/lib/Analysis/LazyValueInfo.cpp +--- a/llvm/lib/Analysis/LazyValueInfo.cpp ++++ b/llvm/lib/Analysis/LazyValueInfo.cpp +@@ -96,9 +96,9 @@ + const ValueLatticeElement &B) { + // Undefined is the strongest state. It means the value is known to be along + // an unreachable path. +- if (A.isUndefined()) ++ if (A.isUnknown()) + return A; +- if (B.isUndefined()) ++ if (B.isUnknown()) + return B; + + // If we gave up for one, but got a useable fact from the other, use it. +@@ -1203,7 +1203,7 @@ + // false SETNE. + if (isTrueDest == (Predicate == ICmpInst::ICMP_EQ)) + return ValueLatticeElement::get(cast(RHS)); +- else ++ else if (!isa(RHS)) + return ValueLatticeElement::getNot(cast(RHS)); + } + } +@@ -1722,7 +1722,7 @@ + const DataLayout &DL = BB->getModule()->getDataLayout(); + ValueLatticeElement Result = + getImpl(PImpl, AC, &DL, DT).getValueInBlock(V, BB, CxtI); +- if (Result.isUndefined()) ++ if (Result.isUnknown()) + return ConstantRange::getEmpty(Width); + if (Result.isConstantRange()) + return Result.getConstantRange(); +@@ -1761,7 +1761,7 @@ + ValueLatticeElement Result = + getImpl(PImpl, AC, &DL, DT).getValueOnEdge(V, FromBB, ToBB, CxtI); + +- if (Result.isUndefined()) ++ if (Result.isUnknown()) + return ConstantRange::getEmpty(Width); + if (Result.isConstantRange()) + return Result.getConstantRange(); +@@ -1991,7 +1991,7 @@ + for (auto &Arg : F->args()) { + ValueLatticeElement Result = LVIImpl->getValueInBlock( + const_cast(&Arg), const_cast(BB)); +- if (Result.isUndefined()) ++ if (Result.isUnknown()) + continue; + OS << "; LatticeVal for: '" << Arg << "' is: " << Result << "\n"; + } +diff --git a/llvm/lib/Analysis/ValueLattice.cpp b/llvm/lib/Analysis/ValueLattice.cpp +--- a/llvm/lib/Analysis/ValueLattice.cpp ++++ b/llvm/lib/Analysis/ValueLattice.cpp +@@ -10,8 +10,10 @@ + + namespace llvm { + raw_ostream &operator<<(raw_ostream &OS, const ValueLatticeElement &Val) { +- if (Val.isUndefined()) +- return OS << "undefined"; ++ if (Val.isUnknown()) ++ return OS << "unknown"; ++ if (Val.isUndef()) ++ return OS << "undef"; + if (Val.isOverdefined()) + return OS << "overdefined"; + +diff --git a/llvm/test/Transforms/CorrelatedValuePropagation/merge-range-and-undef.ll b/llvm/test/Transforms/CorrelatedValuePropagation/merge-range-and-undef.ll +new file mode 100644 +--- /dev/null ++++ b/llvm/test/Transforms/CorrelatedValuePropagation/merge-range-and-undef.ll +@@ -0,0 +1,299 @@ ++; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ++; RUN: opt -S -correlated-propagation %s | FileCheck %s ++ ++; Test case for PR44949. ++ ++; We can remove `%res = and i64 %p, 255`, because %r = 0 and we can eliminate ++; %p as well. ++define i64 @constant_and_undef(i1 %c1, i64 %a) { ++; CHECK-LABEL: @constant_and_undef( ++; CHECK-NEXT: entry: ++; CHECK-NEXT: br i1 [[C1:%.*]], label [[BB1:%.*]], label [[BB2:%.*]] ++; CHECK: bb1: ++; CHECK-NEXT: br label [[BB3:%.*]] ++; CHECK: bb2: ++; CHECK-NEXT: [[R:%.*]] = and i64 [[A:%.*]], 0 ++; CHECK-NEXT: br label [[BB3]] ++; CHECK: bb3: ++; CHECK-NEXT: ret i64 0 ++; ++entry: ++ br i1 %c1, label %bb1, label %bb2 ++ ++bb1: ++ br label %bb3 ++ ++bb2: ++ %r = and i64 %a, 0 ++ br label %bb3 ++ ++bb3: ++ %p = phi i64 [ undef, %bb1 ], [ %r, %bb2 ] ++ %res = and i64 %p, 255 ++ ret i64 %res ++} ++ ++; Check that we go to overdefined when merging a constant range with undef. We ++; cannot remove '%res = and i64 %p, 255'. ++; FIXME: should not remove '%res = and i64 %p, 255' ++define i64 @constant_range_and_undef(i1 %cond, i64 %a) { ++; CHECK-LABEL: @constant_range_and_undef( ++; CHECK-NEXT: entry: ++; CHECK-NEXT: br i1 [[COND:%.*]], label [[BB1:%.*]], label [[BB2:%.*]] ++; CHECK: bb1: ++; CHECK-NEXT: br label [[BB3:%.*]] ++; CHECK: bb2: ++; CHECK-NEXT: [[R:%.*]] = and i64 [[A:%.*]], 255 ++; CHECK-NEXT: br label [[BB3]] ++; CHECK: bb3: ++; CHECK-NEXT: [[P:%.*]] = phi i64 [ undef, [[BB1]] ], [ [[R]], [[BB2]] ] ++; CHECK-NEXT: [[RES:%.*]] = and i64 [[P]], 255 ++; CHECK-NEXT: ret i64 [[RES]] ++; ++entry: ++ br i1 %cond, label %bb1, label %bb2 ++ ++bb1: ++ br label %bb3 ++ ++bb2: ++ %r = and i64 %a, 255 ++ br label %bb3 ++ ++bb3: ++ %p = phi i64 [ undef, %bb1 ], [ %r, %bb2 ] ++ %res = and i64 %p, 255 ++ ret i64 %res ++} ++ ++define i64 @constant_range_and_undef2(i1 %c1, i1 %c2, i64 %a) { ++; CHECK-LABEL: @constant_range_and_undef2( ++; CHECK-NEXT: entry: ++; CHECK-NEXT: br i1 [[C1:%.*]], label [[BB1:%.*]], label [[BB2:%.*]] ++; CHECK: bb1: ++; CHECK-NEXT: [[V1:%.*]] = add i64 undef, undef ++; CHECK-NEXT: br label [[BB3:%.*]] ++; CHECK: bb2: ++; CHECK-NEXT: [[V2:%.*]] = and i64 [[A:%.*]], 255 ++; CHECK-NEXT: br label [[BB3]] ++; CHECK: bb3: ++; CHECK-NEXT: [[P:%.*]] = phi i64 [ [[V1]], [[BB1]] ], [ [[V2]], [[BB2]] ] ++; CHECK-NEXT: br i1 [[C2:%.*]], label [[BB4:%.*]], label [[BB5:%.*]] ++; CHECK: bb4: ++; CHECK-NEXT: br label [[BB6:%.*]] ++; CHECK: bb5: ++; CHECK-NEXT: [[V3:%.*]] = and i64 [[A]], 255 ++; CHECK-NEXT: br label [[BB6]] ++; CHECK: bb6: ++; CHECK-NEXT: [[P2:%.*]] = phi i64 [ [[P]], [[BB4]] ], [ [[V3]], [[BB5]] ] ++; CHECK-NEXT: [[RES:%.*]] = and i64 [[P2]], 255 ++; CHECK-NEXT: ret i64 [[RES]] ++; ++entry: ++ br i1 %c1, label %bb1, label %bb2 ++ ++bb1: ++ %v1 = add i64 undef, undef ++ br label %bb3 ++ ++bb2: ++ %v2 = and i64 %a, 255 ++ br label %bb3 ++ ++bb3: ++ %p = phi i64 [ %v1, %bb1 ], [ %v2, %bb2 ] ++ br i1 %c2, label %bb4, label %bb5 ++ ++bb4: ++ br label %bb6 ++ ++bb5: ++ %v3 = and i64 %a, 255 ++ br label %bb6 ++ ++bb6: ++ %p2 = phi i64 [ %p, %bb4 ], [ %v3, %bb5 ] ++ %res = and i64 %p2, 255 ++ ret i64 %res ++} ++ ++define i1 @constant_range_and_undef_3(i1 %cond, i64 %a) { ++; CHECK-LABEL: @constant_range_and_undef_3( ++; CHECK-NEXT: entry: ++; CHECK-NEXT: br i1 [[COND:%.*]], label [[BB1:%.*]], label [[BB2:%.*]] ++; CHECK: bb1: ++; CHECK-NEXT: br label [[BB3:%.*]] ++; CHECK: bb2: ++; CHECK-NEXT: [[R:%.*]] = and i64 [[A:%.*]], 255 ++; CHECK-NEXT: br label [[BB3]] ++; CHECK: bb3: ++; CHECK-NEXT: [[P:%.*]] = phi i64 [ undef, [[BB1]] ], [ [[R]], [[BB2]] ] ++; CHECK-NEXT: [[C:%.*]] = icmp ult i64 [[P]], 256 ++; CHECK-NEXT: ret i1 [[C]] ++; ++entry: ++ br i1 %cond, label %bb1, label %bb2 ++ ++bb1: ++ br label %bb3 ++ ++bb2: ++ %r = and i64 %a, 255 ++ br label %bb3 ++ ++bb3: ++ %p = phi i64 [ undef, %bb1 ], [ %r, %bb2 ] ++ %c = icmp ult i64 %p, 256 ++ ret i1 %c ++} ++ ++; Same as @constant_range_and_undef, but with 3 incoming ++; values: undef, a constant and a constant range. ++define i64 @constant_range_and_undef_3_incoming_v1(i1 %c1, i1 %c2, i64 %a) { ++; CHECK-LABEL: @constant_range_and_undef_3_incoming_v1( ++; CHECK-NEXT: entry: ++; CHECK-NEXT: br i1 [[C1:%.*]], label [[BB1:%.*]], label [[BB2:%.*]] ++; CHECK: bb1: ++; CHECK-NEXT: [[R:%.*]] = and i64 [[A:%.*]], 255 ++; CHECK-NEXT: br label [[BB4:%.*]] ++; CHECK: bb2: ++; CHECK-NEXT: br i1 [[C2:%.*]], label [[BB3:%.*]], label [[BB4]] ++; CHECK: bb3: ++; CHECK-NEXT: br label [[BB4]] ++; CHECK: bb4: ++; CHECK-NEXT: [[P:%.*]] = phi i64 [ [[R]], [[BB1]] ], [ 10, [[BB2]] ], [ undef, [[BB3]] ] ++; CHECK-NEXT: [[RES:%.*]] = and i64 [[P]], 255 ++; CHECK-NEXT: ret i64 [[RES]] ++; ++entry: ++ br i1 %c1, label %bb1, label %bb2 ++ ++bb1: ++ %r = and i64 %a, 255 ++ br label %bb4 ++ ++bb2: ++ br i1 %c2, label %bb3, label %bb4 ++ ++bb3: ++ br label %bb4 ++ ++bb4: ++ %p = phi i64 [ %r, %bb1 ], [ 10, %bb2], [ undef, %bb3 ] ++ %res = and i64 %p, 255 ++ ret i64 %res ++} ++ ++; Same as @constant_range_and_undef_3_incoming_v1, but with different order of ++; incoming values. ++define i64 @constant_range_and_undef_3_incoming_v2(i1 %c1, i1 %c2, i64 %a) { ++; CHECK-LABEL: @constant_range_and_undef_3_incoming_v2( ++; CHECK-NEXT: entry: ++; CHECK-NEXT: br i1 [[C1:%.*]], label [[BB1:%.*]], label [[BB2:%.*]] ++; CHECK: bb1: ++; CHECK-NEXT: br label [[BB4:%.*]] ++; CHECK: bb2: ++; CHECK-NEXT: br i1 [[C2:%.*]], label [[BB3:%.*]], label [[BB4]] ++; CHECK: bb3: ++; CHECK-NEXT: [[R:%.*]] = and i64 [[A:%.*]], 255 ++; CHECK-NEXT: br label [[BB4]] ++; CHECK: bb4: ++; CHECK-NEXT: [[P:%.*]] = phi i64 [ undef, [[BB1]] ], [ 10, [[BB2]] ], [ [[R]], [[BB3]] ] ++; CHECK-NEXT: ret i64 [[P]] ++; ++entry: ++ br i1 %c1, label %bb1, label %bb2 ++ ++bb1: ++ br label %bb4 ++ ++bb2: ++ br i1 %c2, label %bb3, label %bb4 ++ ++bb3: ++ %r = and i64 %a, 255 ++ br label %bb4 ++ ++bb4: ++ %p = phi i64 [ undef, %bb1 ], [ 10, %bb2], [ %r, %bb3 ] ++ %res = and i64 %p, 255 ++ ret i64 %res ++} ++ ++; Same as @constant_range_and_undef_3_incoming_v1, but with different order of ++; incoming values. ++define i64 @constant_range_and_undef_3_incoming_v3(i1 %c1, i1 %c2, i64 %a) { ++; CHECK-LABEL: @constant_range_and_undef_3_incoming_v3( ++; CHECK-NEXT: entry: ++; CHECK-NEXT: br i1 [[C1:%.*]], label [[BB1:%.*]], label [[BB2:%.*]] ++; CHECK: bb1: ++; CHECK-NEXT: [[R:%.*]] = and i64 [[A:%.*]], 255 ++; CHECK-NEXT: br label [[BB4:%.*]] ++; CHECK: bb2: ++; CHECK-NEXT: br i1 [[C2:%.*]], label [[BB3:%.*]], label [[BB4]] ++; CHECK: bb3: ++; CHECK-NEXT: br label [[BB4]] ++; CHECK: bb4: ++; CHECK-NEXT: [[P:%.*]] = phi i64 [ [[R]], [[BB1]] ], [ undef, [[BB2]] ], [ 10, [[BB3]] ] ++; CHECK-NEXT: [[RES:%.*]] = and i64 [[P]], 255 ++; CHECK-NEXT: ret i64 [[RES]] ++; ++entry: ++ br i1 %c1, label %bb1, label %bb2 ++ ++bb1: ++ %r = and i64 %a, 255 ++ br label %bb4 ++ ++bb2: ++ br i1 %c2, label %bb3, label %bb4 ++ ++bb3: ++ br label %bb4 ++ ++bb4: ++ %p = phi i64 [ %r, %bb1 ], [ undef, %bb2], [ 10, %bb3 ] ++ %res = and i64 %p, 255 ++ ret i64 %res ++} ++ ++ ++define i64 @constant_range_and_phi_constant_undef(i1 %c1, i1 %c2, i64 %a) { ++; CHECK-LABEL: @constant_range_and_phi_constant_undef( ++; CHECK-NEXT: entry: ++; CHECK-NEXT: br i1 [[C1:%.*]], label [[BB1:%.*]], label [[BB2:%.*]] ++; CHECK: bb1: ++; CHECK-NEXT: [[R:%.*]] = and i64 [[A:%.*]], 255 ++; CHECK-NEXT: br label [[BB5:%.*]] ++; CHECK: bb2: ++; CHECK-NEXT: br i1 [[C2:%.*]], label [[BB3:%.*]], label [[BB4:%.*]] ++; CHECK: bb3: ++; CHECK-NEXT: br label [[BB4]] ++; CHECK: bb4: ++; CHECK-NEXT: br label [[BB5]] ++; CHECK: bb5: ++; CHECK-NEXT: [[P:%.*]] = phi i64 [ [[R]], [[BB1]] ], [ 10, [[BB4]] ] ++; CHECK-NEXT: ret i64 [[P]] ++; ++entry: ++ br i1 %c1, label %bb1, label %bb2 ++ ++bb1: ++ %r = and i64 %a, 255 ++ br label %bb5 ++ ++bb2: ++ br i1 %c2, label %bb3, label %bb4 ++ ++bb3: ++ br label %bb4 ++ ++bb4: ++ %p.1 = phi i64 [ 10, %bb2 ], [ undef, %bb3] ++ br label %bb5 ++ ++bb5: ++ %p = phi i64 [ %r, %bb1 ], [ %p.1, %bb4] ++ %res = and i64 %p, 255 ++ ret i64 %res ++} +diff --git a/llvm/test/Transforms/JumpThreading/ne-undef.ll b/llvm/test/Transforms/JumpThreading/ne-undef.ll +new file mode 100644 +--- /dev/null ++++ b/llvm/test/Transforms/JumpThreading/ne-undef.ll +@@ -0,0 +1,61 @@ ++; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ++; RUN: opt -jump-threading -S %s | FileCheck %s ++ ++declare i1 @cond() ++ ++define hidden void @hoge(i1 %c1, i32 %x) { ++; CHECK-LABEL: @hoge( ++; CHECK-NEXT: bb: ++; CHECK-NEXT: br label [[BB13:%.*]] ++; CHECK: bb4: ++; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP7:%.*]], undef ++; CHECK-NEXT: br i1 [[TMP3]], label [[BB5:%.*]], label [[BB13]] ++; CHECK: bb5: ++; CHECK-NEXT: br label [[BB6:%.*]] ++; CHECK: bb6: ++; CHECK-NEXT: [[TMP7]] = phi i32 [ [[TMP7]], [[BB5]] ], [ [[X:%.*]], [[BB8:%.*]] ] ++; CHECK-NEXT: [[C:%.*]] = call i1 @cond() ++; CHECK-NEXT: br i1 [[C]], label [[BB4:%.*]], label [[BB8]] ++; CHECK: bb8: ++; CHECK-NEXT: br label [[BB6]] ++; CHECK: bb13: ++; CHECK-NEXT: ret void ++; ++bb: ++ br i1 false, label %bb1, label %bb13 ++ ++bb1: ; preds = %bb ++ br label %bb2 ++ ++bb2: ; preds = %bb12, %bb1 ++ %tmp = phi i32 [ 10, %bb1 ], [ %tmp7, %bb12 ] ++ %tmp3 = icmp ne i32 %tmp, undef ++ br label %bb4 ++ ++bb4: ; preds = %bb2 ++ br i1 %tmp3, label %bb5, label %bb13 ++ ++bb5: ; preds = %bb4 ++ br label %bb6 ++ ++bb6: ; preds = %bb8, %bb5 ++ %tmp7 = phi i32 [ %tmp, %bb5 ], [ %x, %bb8 ] ++ %c = call i1 @cond() ++ br i1 %c, label %bb9, label %bb8 ++ ++bb8: ; preds = %bb6 ++ br label %bb6 ++ ++bb9: ; preds = %bb6 ++ br label %bb10 ++ ++bb10: ; preds = %bb9 ++ br label %bb12 ++ ++bb12: ; preds = %bb10 ++ br label %bb2 ++ ++bb13: ; preds = %bb4 ++ ret void ++ ++} +diff --git a/llvm/test/Transforms/SCCP/float-phis.ll b/llvm/test/Transforms/SCCP/float-phis.ll +new file mode 100644 +--- /dev/null ++++ b/llvm/test/Transforms/SCCP/float-phis.ll +@@ -0,0 +1,26 @@ ++; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ++; RUN: opt < %s -sccp -S | FileCheck %s ++ ++declare void @use(i1) ++ ++define void @test(i1 %c) { ++; CHECK-LABEL: @test( ++; CHECK-NEXT: br label [[DO_BODY:%.*]] ++; CHECK: do.body: ++; CHECK-NEXT: br i1 [[C:%.*]], label [[DO_BODY]], label [[FOR_COND41:%.*]] ++; CHECK: for.cond41: ++; CHECK-NEXT: call void @use(i1 true) ++; CHECK-NEXT: br label [[FOR_COND41]] ++; ++ br label %do.body ++ ++do.body: ; preds = %do.body, %entry ++ br i1 %c, label %do.body, label %for.cond41 ++ ++for.cond41: ; preds = %for.cond41, %do.body ++ %mid.0 = phi float [ 0.000000e+00, %for.cond41 ], [ undef, %do.body ] ++ %fc = fcmp oeq float %mid.0, 0.000000e+00 ++ call void @use(i1 %fc) ++ ++ br label %for.cond41 ++} +diff --git a/llvm/test/Transforms/SCCP/int-phis.ll b/llvm/test/Transforms/SCCP/int-phis.ll +new file mode 100644 +--- /dev/null ++++ b/llvm/test/Transforms/SCCP/int-phis.ll +@@ -0,0 +1,61 @@ ++; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ++; RUN: opt < %s -sccp -S | FileCheck %s ++ ++declare void @use(i1) ++ ++define void @read_dmatrix() #0 { ++; CHECK-LABEL: @read_dmatrix( ++; CHECK-NEXT: entry: ++; CHECK-NEXT: [[HEIGHT:%.*]] = alloca i32, align 4 ++; CHECK-NEXT: br label [[FOR_COND:%.*]] ++; CHECK: for.cond: ++; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[HEIGHT]], align 4 ++; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP0]] ++; CHECK-NEXT: br i1 [[CMP]], label [[FOR_COND6:%.*]], label [[FOR_END16:%.*]] ++; CHECK: for.cond6: ++; CHECK-NEXT: br label [[FOR_COND]] ++; CHECK: for.end16: ++; CHECK-NEXT: ret void ++; ++entry: ++ %height = alloca i32, align 4 ++ br label %for.cond ++ ++for.cond: ; preds = %for.cond6, %entry ++ %j.0 = phi i32 [ undef, %entry ], [ 0, %for.cond6 ] ++ %0 = load i32, i32* %height, align 4 ++ %cmp = icmp slt i32 0, %0 ++ br i1 %cmp, label %for.cond6, label %for.end16 ++ ++for.cond6: ; preds = %for.cond ++ br label %for.cond ++ ++for.end16: ; preds = %for.cond ++ %sub21 = sub nsw i32 %j.0, 1 ++ ret void ++} ++ ++declare i1 @cond() ++ ++define void @emptyTT() #0 { ++; CHECK-LABEL: @emptyTT( ++; CHECK-NEXT: entry: ++; CHECK-NEXT: br label [[FOR_COND:%.*]] ++; CHECK: for.cond: ++; CHECK-NEXT: [[C:%.*]] = call i1 @cond() ++; CHECK-NEXT: br i1 [[C]], label [[FOR_COND]], label [[EXIT:%.*]] ++; CHECK: exit: ++; CHECK-NEXT: ret void ++; ++entry: ++ br label %for.cond ++ ++for.cond: ; preds = %for.cond, %entry ++ %.compoundliteral.sroa.0.0 = phi i64 [ undef, %entry ], [ 0, %for.cond ] ++ %bf.clear = and i64 %.compoundliteral.sroa.0.0, -67108864 ++ %c = call i1 @cond() ++ br i1 %c, label %for.cond, label %exit ++ ++exit: ++ ret void ++} +diff --git a/llvm/test/Transforms/SCCP/range-and-ip.ll b/llvm/test/Transforms/SCCP/range-and-ip.ll +new file mode 100644 +--- /dev/null ++++ b/llvm/test/Transforms/SCCP/range-and-ip.ll +@@ -0,0 +1,47 @@ ++; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ++; RUN: opt -S -ipsccp %s | FileCheck %s ++ ++; Make sure IPSCCP does not assume %r < 256 for @f1. Undef is passed at a call ++; site, which won't be eliminated. ++ ++define i1 @constant_and_undef(i64 %a) { ++; CHECK-LABEL: @constant_and_undef( ++; CHECK-NEXT: [[C_1:%.*]] = call i1 @f1(i64 undef) ++; CHECK-NEXT: br label [[BB1:%.*]] ++; CHECK: bb1: ++; CHECK-NEXT: [[C_2:%.*]] = call i1 @f1(i64 10) ++; CHECK-NEXT: br label [[BB2:%.*]] ++; CHECK: bb2: ++; CHECK-NEXT: [[RANGE:%.*]] = and i64 [[A:%.*]], 255 ++; CHECK-NEXT: [[C_3:%.*]] = call i1 @f1(i64 [[RANGE]]) ++; CHECK-NEXT: [[R_1:%.*]] = and i1 [[C_1]], [[C_2]] ++; CHECK-NEXT: [[R_2:%.*]] = and i1 [[R_1]], [[C_3]] ++; CHECK-NEXT: ret i1 [[R_2]] ++; ++ %c.1 = call i1 @f1(i64 undef) ++ br label %bb1 ++ ++bb1: ++ %c.2 = call i1 @f1(i64 10) ++ br label %bb2 ++ ++bb2: ++ %range = and i64 %a, 255 ++ %c.3 = call i1 @f1(i64 %range) ++ %r.1 = and i1 %c.1, %c.2 ++ %r.2 = and i1 %r.1, %c.3 ++ ret i1 %r.2 ++} ++ ++declare void @sideeffect(i1, i64 %a) ++ ++define internal i1 @f1(i64 %r) { ++; CHECK-LABEL: define {{.*}} @f1( ++; CHECK-NEXT: [[C:%.*]] = icmp ult i64 [[R:%.*]], 256 ++; CHECK-NEXT: call void @sideeffect(i1 [[C]], i64 [[R]]) ++; CHECK-NEXT: ret i1 [[C]] ++; ++ %c = icmp ult i64 %r, 256 ++ call void @sideeffect(i1 %c, i64 %r) ++ ret i1 %c ++} +diff --git a/llvm/test/Transforms/SCCP/range-and.ll b/llvm/test/Transforms/SCCP/range-and.ll +new file mode 100644 +--- /dev/null ++++ b/llvm/test/Transforms/SCCP/range-and.ll +@@ -0,0 +1,395 @@ ++; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ++; RUN: opt -S -sccp %s | FileCheck %s ++ ++; Test case for PR44949. ++ ++; We can remove `%res = and i64 %p, 255`, because %r = 0 and we can eliminate ++; %p as well. ++define i64 @constant_and_undef(i1 %c1, i64 %a) { ++; CHECK-LABEL: @constant_and_undef( ++; CHECK-NEXT: entry: ++; CHECK-NEXT: br i1 [[C1:%.*]], label [[BB1:%.*]], label [[BB2:%.*]] ++; CHECK: bb1: ++; CHECK-NEXT: br label [[BB3:%.*]] ++; CHECK: bb2: ++; CHECK-NEXT: br label [[BB3]] ++; CHECK: bb3: ++; CHECK-NEXT: ret i64 0 ++; ++entry: ++ br i1 %c1, label %bb1, label %bb2 ++ ++bb1: ++ br label %bb3 ++ ++bb2: ++ %r = and i64 %a, 0 ++ br label %bb3 ++ ++bb3: ++ %p = phi i64 [ undef, %bb1 ], [ %r, %bb2 ] ++ %res = and i64 %p, 255 ++ ret i64 %res ++} ++ ++; Check that we go to overdefined when merging a constant range with undef. We ++; cannot remove '%res = and i64 %p, 255'. ++define i64 @constant_range_and_undef(i1 %cond, i64 %a) { ++; CHECK-LABEL: @constant_range_and_undef( ++; CHECK-NEXT: entry: ++; CHECK-NEXT: br i1 [[COND:%.*]], label [[BB1:%.*]], label [[BB2:%.*]] ++; CHECK: bb1: ++; CHECK-NEXT: br label [[BB3:%.*]] ++; CHECK: bb2: ++; CHECK-NEXT: [[R:%.*]] = and i64 [[A:%.*]], 255 ++; CHECK-NEXT: br label [[BB3]] ++; CHECK: bb3: ++; CHECK-NEXT: [[P:%.*]] = phi i64 [ undef, [[BB1]] ], [ [[R]], [[BB2]] ] ++; CHECK-NEXT: [[RES:%.*]] = and i64 [[P]], 255 ++; CHECK-NEXT: ret i64 [[RES]] ++; ++entry: ++ br i1 %cond, label %bb1, label %bb2 ++ ++bb1: ++ br label %bb3 ++ ++bb2: ++ %r = and i64 %a, 255 ++ br label %bb3 ++ ++bb3: ++ %p = phi i64 [ undef, %bb1 ], [ %r, %bb2 ] ++ %res = and i64 %p, 255 ++ ret i64 %res ++} ++ ++; Same as @constant_range_and_undef, with the undef coming from the other ++; block. ++define i64 @constant_range_and_undef_switched_incoming(i1 %cond, i64 %a) { ++; CHECK-LABEL: @constant_range_and_undef_switched_incoming( ++; CHECK-NEXT: entry: ++; CHECK-NEXT: br i1 [[COND:%.*]], label [[BB1:%.*]], label [[BB2:%.*]] ++; CHECK: bb1: ++; CHECK-NEXT: [[R:%.*]] = and i64 [[A:%.*]], 255 ++; CHECK-NEXT: br label [[BB3:%.*]] ++; CHECK: bb2: ++; CHECK-NEXT: br label [[BB3]] ++; CHECK: bb3: ++; CHECK-NEXT: [[P:%.*]] = phi i64 [ [[R]], [[BB1]] ], [ undef, [[BB2]] ] ++; CHECK-NEXT: [[RES:%.*]] = and i64 [[P]], 255 ++; CHECK-NEXT: ret i64 [[RES]] ++; ++entry: ++ br i1 %cond, label %bb1, label %bb2 ++ ++bb1: ++ %r = and i64 %a, 255 ++ br label %bb3 ++ ++bb2: ++ br label %bb3 ++ ++bb3: ++ %p = phi i64 [ %r, %bb1 ], [ undef, %bb2 ] ++ %res = and i64 %p, 255 ++ ret i64 %res ++} ++ ++define i1 @constant_range_and_255_100(i1 %cond, i64 %a) { ++; CHECK-LABEL: @constant_range_and_255_100( ++; CHECK-NEXT: entry: ++; CHECK-NEXT: br i1 [[COND:%.*]], label [[BB1:%.*]], label [[BB2:%.*]] ++; CHECK: bb1: ++; CHECK-NEXT: [[R_1:%.*]] = and i64 [[A:%.*]], 100 ++; CHECK-NEXT: br label [[BB3:%.*]] ++; CHECK: bb2: ++; CHECK-NEXT: [[R_2:%.*]] = and i64 [[A]], 255 ++; CHECK-NEXT: br label [[BB3]] ++; CHECK: bb3: ++; CHECK-NEXT: [[P:%.*]] = phi i64 [ [[R_1]], [[BB1]] ], [ [[R_2]], [[BB2]] ] ++; CHECK-NEXT: [[P_AND:%.*]] = and i64 [[P]], 512 ++; CHECK-NEXT: [[C:%.*]] = icmp ult i64 [[P_AND]], 256 ++; CHECK-NEXT: ret i1 [[C]] ++; ++entry: ++ br i1 %cond, label %bb1, label %bb2 ++ ++bb1: ++ %r.1 = and i64 %a, 100 ++ br label %bb3 ++ ++bb2: ++ %r.2 = and i64 %a, 255 ++ br label %bb3 ++ ++bb3: ++ %p = phi i64 [ %r.1, %bb1 ], [ %r.2, %bb2 ] ++ %p.and = and i64 %p, 512 ++ %c = icmp ult i64 %p.and, 256 ++ ret i1 %c ++} ++ ++ ++define i64 @constant_range_and_undef2(i1 %c1, i1 %c2, i64 %a) { ++; CHECK-LABEL: @constant_range_and_undef2( ++; CHECK-NEXT: entry: ++; CHECK-NEXT: br i1 [[C1:%.*]], label [[BB1:%.*]], label [[BB2:%.*]] ++; CHECK: bb1: ++; CHECK-NEXT: br label [[BB3:%.*]] ++; CHECK: bb2: ++; CHECK-NEXT: [[V2:%.*]] = and i64 [[A:%.*]], 255 ++; CHECK-NEXT: br label [[BB3]] ++; CHECK: bb3: ++; CHECK-NEXT: [[P:%.*]] = phi i64 [ undef, [[BB1]] ], [ [[V2]], [[BB2]] ] ++; CHECK-NEXT: br i1 [[C2:%.*]], label [[BB4:%.*]], label [[BB5:%.*]] ++; CHECK: bb4: ++; CHECK-NEXT: br label [[BB6:%.*]] ++; CHECK: bb5: ++; CHECK-NEXT: [[V3:%.*]] = and i64 [[A]], 255 ++; CHECK-NEXT: br label [[BB6]] ++; CHECK: bb6: ++; CHECK-NEXT: [[P2:%.*]] = phi i64 [ [[P]], [[BB4]] ], [ [[V3]], [[BB5]] ] ++; CHECK-NEXT: [[RES:%.*]] = and i64 [[P2]], 255 ++; CHECK-NEXT: ret i64 [[RES]] ++; ++entry: ++ br i1 %c1, label %bb1, label %bb2 ++ ++bb1: ++ %v1 = add i64 undef, undef ++ br label %bb3 ++ ++bb2: ++ %v2 = and i64 %a, 255 ++ br label %bb3 ++ ++bb3: ++ %p = phi i64 [ %v1, %bb1 ], [ %v2, %bb2 ] ++ br i1 %c2, label %bb4, label %bb5 ++ ++bb4: ++ br label %bb6 ++ ++bb5: ++ %v3 = and i64 %a, 255 ++ br label %bb6 ++ ++bb6: ++ %p2 = phi i64 [ %p, %bb4 ], [ %v3, %bb5 ] ++ %res = and i64 %p2, 255 ++ ret i64 %res ++} ++ ++define i1 @constant_range_and_undef_3(i1 %cond, i64 %a) { ++; CHECK-LABEL: @constant_range_and_undef_3( ++; CHECK-NEXT: entry: ++; CHECK-NEXT: br i1 [[COND:%.*]], label [[BB1:%.*]], label [[BB2:%.*]] ++; CHECK: bb1: ++; CHECK-NEXT: br label [[BB3:%.*]] ++; CHECK: bb2: ++; CHECK-NEXT: [[R:%.*]] = and i64 [[A:%.*]], 255 ++; CHECK-NEXT: br label [[BB3]] ++; CHECK: bb3: ++; CHECK-NEXT: [[P:%.*]] = phi i64 [ undef, [[BB1]] ], [ [[R]], [[BB2]] ] ++; CHECK-NEXT: [[C:%.*]] = icmp ult i64 [[P]], 256 ++; CHECK-NEXT: ret i1 [[C]] ++; ++entry: ++ br i1 %cond, label %bb1, label %bb2 ++ ++bb1: ++ br label %bb3 ++ ++bb2: ++ %r = and i64 %a, 255 ++ br label %bb3 ++ ++bb3: ++ %p = phi i64 [ undef, %bb1 ], [ %r, %bb2 ] ++ %c = icmp ult i64 %p, 256 ++ ret i1 %c ++} ++ ++define i1 @constant_range_and_undef_3_switched_incoming(i1 %cond, i64 %a) { ++; CHECK-LABEL: @constant_range_and_undef_3_switched_incoming( ++; CHECK-NEXT: entry: ++; CHECK-NEXT: br i1 [[COND:%.*]], label [[BB1:%.*]], label [[BB2:%.*]] ++; CHECK: bb1: ++; CHECK-NEXT: [[R:%.*]] = and i64 [[A:%.*]], 255 ++; CHECK-NEXT: br label [[BB3:%.*]] ++; CHECK: bb2: ++; CHECK-NEXT: br label [[BB3]] ++; CHECK: bb3: ++; CHECK-NEXT: [[P:%.*]] = phi i64 [ [[R]], [[BB1]] ], [ undef, [[BB2]] ] ++; CHECK-NEXT: [[C:%.*]] = icmp ult i64 [[P]], 256 ++; CHECK-NEXT: ret i1 [[C]] ++; ++entry: ++ br i1 %cond, label %bb1, label %bb2 ++ ++bb1: ++ %r = and i64 %a, 255 ++ br label %bb3 ++ ++bb2: ++ br label %bb3 ++ ++bb3: ++ %p = phi i64 [ %r, %bb1 ], [ undef, %bb2 ] ++ %c = icmp ult i64 %p, 256 ++ ret i1 %c ++} ++ ++; Same as @constant_range_and_undef, but with 3 incoming ++; values: undef, a constant and a constant range. ++define i64 @constant_range_and_undef_3_incoming_v1(i1 %c1, i1 %c2, i64 %a) { ++; CHECK-LABEL: @constant_range_and_undef_3_incoming_v1( ++; CHECK-NEXT: entry: ++; CHECK-NEXT: br i1 [[C1:%.*]], label [[BB1:%.*]], label [[BB2:%.*]] ++; CHECK: bb1: ++; CHECK-NEXT: [[R:%.*]] = and i64 [[A:%.*]], 255 ++; CHECK-NEXT: br label [[BB4:%.*]] ++; CHECK: bb2: ++; CHECK-NEXT: br i1 [[C2:%.*]], label [[BB3:%.*]], label [[BB4]] ++; CHECK: bb3: ++; CHECK-NEXT: br label [[BB4]] ++; CHECK: bb4: ++; CHECK-NEXT: [[P:%.*]] = phi i64 [ [[R]], [[BB1]] ], [ 10, [[BB2]] ], [ undef, [[BB3]] ] ++; CHECK-NEXT: [[RES:%.*]] = and i64 [[P]], 255 ++; CHECK-NEXT: ret i64 [[RES]] ++; ++entry: ++ br i1 %c1, label %bb1, label %bb2 ++ ++bb1: ++ %r = and i64 %a, 255 ++ br label %bb4 ++ ++bb2: ++ br i1 %c2, label %bb3, label %bb4 ++ ++bb3: ++ br label %bb4 ++ ++bb4: ++ %p = phi i64 [ %r, %bb1 ], [ 10, %bb2], [ undef, %bb3 ] ++ %res = and i64 %p, 255 ++ ret i64 %res ++} ++ ++; Same as @constant_range_and_undef_3_incoming_v1, but with different order of ++; incoming values. ++define i64 @constant_range_and_undef_3_incoming_v2(i1 %c1, i1 %c2, i64 %a) { ++; CHECK-LABEL: @constant_range_and_undef_3_incoming_v2( ++; CHECK-NEXT: entry: ++; CHECK-NEXT: br i1 [[C1:%.*]], label [[BB1:%.*]], label [[BB2:%.*]] ++; CHECK: bb1: ++; CHECK-NEXT: br label [[BB4:%.*]] ++; CHECK: bb2: ++; CHECK-NEXT: br i1 [[C2:%.*]], label [[BB3:%.*]], label [[BB4]] ++; CHECK: bb3: ++; CHECK-NEXT: [[R:%.*]] = and i64 [[A:%.*]], 255 ++; CHECK-NEXT: br label [[BB4]] ++; CHECK: bb4: ++; CHECK-NEXT: [[P:%.*]] = phi i64 [ undef, [[BB1]] ], [ 10, [[BB2]] ], [ [[R]], [[BB3]] ] ++; CHECK-NEXT: [[RES:%.*]] = and i64 [[P]], 255 ++; CHECK-NEXT: ret i64 [[RES]] ++; ++entry: ++ br i1 %c1, label %bb1, label %bb2 ++ ++bb1: ++ br label %bb4 ++ ++bb2: ++ br i1 %c2, label %bb3, label %bb4 ++ ++bb3: ++ %r = and i64 %a, 255 ++ br label %bb4 ++ ++bb4: ++ %p = phi i64 [ undef, %bb1 ], [ 10, %bb2], [ %r, %bb3 ] ++ %res = and i64 %p, 255 ++ ret i64 %res ++} ++ ++; Same as @constant_range_and_undef_3_incoming_v1, but with different order of ++; incoming values. ++define i64 @constant_range_and_undef_3_incoming_v3(i1 %c1, i1 %c2, i64 %a) { ++; CHECK-LABEL: @constant_range_and_undef_3_incoming_v3( ++; CHECK-NEXT: entry: ++; CHECK-NEXT: br i1 [[C1:%.*]], label [[BB1:%.*]], label [[BB2:%.*]] ++; CHECK: bb1: ++; CHECK-NEXT: [[R:%.*]] = and i64 [[A:%.*]], 255 ++; CHECK-NEXT: br label [[BB4:%.*]] ++; CHECK: bb2: ++; CHECK-NEXT: br i1 [[C2:%.*]], label [[BB3:%.*]], label [[BB4]] ++; CHECK: bb3: ++; CHECK-NEXT: br label [[BB4]] ++; CHECK: bb4: ++; CHECK-NEXT: [[P:%.*]] = phi i64 [ [[R]], [[BB1]] ], [ undef, [[BB2]] ], [ 10, [[BB3]] ] ++; CHECK-NEXT: [[RES:%.*]] = and i64 [[P]], 255 ++; CHECK-NEXT: ret i64 [[RES]] ++; ++entry: ++ br i1 %c1, label %bb1, label %bb2 ++ ++bb1: ++ %r = and i64 %a, 255 ++ br label %bb4 ++ ++bb2: ++ br i1 %c2, label %bb3, label %bb4 ++ ++bb3: ++ br label %bb4 ++ ++bb4: ++ %p = phi i64 [ %r, %bb1 ], [ undef, %bb2], [ 10, %bb3 ] ++ %res = and i64 %p, 255 ++ ret i64 %res ++} ++ ++ ++define i64 @constant_range_and_phi_constant_undef(i1 %c1, i1 %c2, i64 %a) { ++; CHECK-LABEL: @constant_range_and_phi_constant_undef( ++; CHECK-NEXT: entry: ++; CHECK-NEXT: br i1 [[C1:%.*]], label [[BB1:%.*]], label [[BB2:%.*]] ++; CHECK: bb1: ++; CHECK-NEXT: [[R:%.*]] = and i64 [[A:%.*]], 255 ++; CHECK-NEXT: br label [[BB5:%.*]] ++; CHECK: bb2: ++; CHECK-NEXT: br i1 [[C2:%.*]], label [[BB3:%.*]], label [[BB4:%.*]] ++; CHECK: bb3: ++; CHECK-NEXT: br label [[BB4]] ++; CHECK: bb4: ++; CHECK-NEXT: br label [[BB5]] ++; CHECK: bb5: ++; CHECK-NEXT: [[P:%.*]] = phi i64 [ [[R]], [[BB1]] ], [ 10, [[BB4]] ] ++; CHECK-NEXT: [[RES:%.*]] = and i64 [[P]], 255 ++; CHECK-NEXT: ret i64 [[RES]] ++; ++entry: ++ br i1 %c1, label %bb1, label %bb2 ++ ++bb1: ++ %r = and i64 %a, 255 ++ br label %bb5 ++ ++bb2: ++ br i1 %c2, label %bb3, label %bb4 ++ ++bb3: ++ br label %bb4 ++ ++bb4: ++ %p.1 = phi i64 [ 10, %bb2 ], [ undef, %bb3] ++ br label %bb5 ++ ++bb5: ++ %p = phi i64 [ %r, %bb1 ], [ %p.1, %bb4] ++ %res = and i64 %p, 255 ++ ret i64 %res ++} +diff --git a/llvm/unittests/Analysis/ValueLatticeTest.cpp b/llvm/unittests/Analysis/ValueLatticeTest.cpp +--- a/llvm/unittests/Analysis/ValueLatticeTest.cpp ++++ b/llvm/unittests/Analysis/ValueLatticeTest.cpp +@@ -43,6 +43,23 @@ + EXPECT_TRUE(ValueLatticeElement::getNot(C2).isNotConstant()); + } + ++TEST_F(ValueLatticeTest, MarkConstantRange) { ++ auto LV1 = ++ ValueLatticeElement::getRange({APInt(32, 10, true), APInt(32, 20, true)}); ++ ++ // Test markConstantRange() with an equal range. ++ EXPECT_FALSE( ++ LV1.markConstantRange({APInt(32, 10, true), APInt(32, 20, true)})); ++ ++ // Test markConstantRange() with supersets of existing range. ++ EXPECT_TRUE(LV1.markConstantRange({APInt(32, 5, true), APInt(32, 20, true)})); ++ EXPECT_EQ(LV1.getConstantRange().getLower().getLimitedValue(), 5U); ++ EXPECT_EQ(LV1.getConstantRange().getUpper().getLimitedValue(), 20U); ++ EXPECT_TRUE(LV1.markConstantRange({APInt(32, 5, true), APInt(32, 23, true)})); ++ EXPECT_EQ(LV1.getConstantRange().getLower().getLimitedValue(), 5U); ++ EXPECT_EQ(LV1.getConstantRange().getUpper().getLimitedValue(), 23U); ++} ++ + TEST_F(ValueLatticeTest, MergeIn) { + auto I32Ty = IntegerType::get(Context, 32); + auto *C1 = ConstantInt::get(I32Ty, 1); + diff --git a/debian/patches/series b/debian/patches/series index 169ae904..4eaaeebe 100644 --- a/debian/patches/series +++ b/debian/patches/series @@ -139,4 +139,8 @@ no-z3.patch python3-shebang.patch print-lldb-path.patch no-cgi.patch -947f9692440836dcb8d88b74b69dd379d85974ce.patch +d21664cce1db8debe2528f36b1fbd2b8af9c9401.patch + +0001-systemz-allow-configuring-default-SYSTEMZ_DEFAULT_AR.patch + +D76596.diff From eb0cd89811e33b0cd1fb7339e7f2d08f4129124f Mon Sep 17 00:00:00 2001 From: Gianfranco Costamagna Date: Thu, 2 Apr 2020 16:48:00 +0200 Subject: [PATCH 04/21] Upload to unstable --- debian/changelog | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/debian/changelog b/debian/changelog index 4ddcb4c0..8ecd6377 100644 --- a/debian/changelog +++ b/debian/changelog @@ -1,8 +1,9 @@ -llvm-toolchain-10 (1:10.0.0-2) UNRELEASED; urgency=medium +llvm-toolchain-10 (1:10.0.0-2) unstable; urgency=medium [ Dimitri John Ledkov ] * s390x: set default abi to z196 for debian, and z13 for ubuntu. LP: #1864226 + [ Matthias Klose ] * Apply D76596.diff, proposed backport from the trunk. LP: #1867173. From a348a3954405fd0df13c44fb62998dd03719a41a Mon Sep 17 00:00:00 2001 From: Sylvestre Ledru Date: Thu, 2 Apr 2020 21:43:01 +0200 Subject: [PATCH 05/21] detail what we fixed --- debian/changelog | 1 + 1 file changed, 1 insertion(+) diff --git a/debian/changelog b/debian/changelog index 8ecd6377..003142ea 100644 --- a/debian/changelog +++ b/debian/changelog @@ -6,6 +6,7 @@ llvm-toolchain-10 (1:10.0.0-2) unstable; urgency=medium [ Matthias Klose ] * Apply D76596.diff, proposed backport from the trunk. LP: #1867173. + This was causing postgresql to FTBFS with llvm 10 -- Gianfranco Costamagna Fri, 27 Mar 2020 05:16:28 +0100 From 868a0382d4278e48e7b0c8946252e2e959753d7a Mon Sep 17 00:00:00 2001 From: Jessica Clarke Date: Wed, 1 Apr 2020 16:25:41 +0100 Subject: [PATCH 06/21] Cherry-pick upstream patch D74453 to fix atomic compare-and-swap on riscv64 --- debian/changelog | 7 + .../patches/D74453-riscv-atomic_cmp_xchg.diff | 189 ++++++++++++++++++ debian/patches/series | 1 + 3 files changed, 197 insertions(+) create mode 100644 debian/patches/D74453-riscv-atomic_cmp_xchg.diff diff --git a/debian/changelog b/debian/changelog index 003142ea..8a3ea16a 100644 --- a/debian/changelog +++ b/debian/changelog @@ -278,6 +278,13 @@ llvm-toolchain-snapshot (1:10~svn366440-1~exp1) experimental; urgency=medium -- Sylvestre Ledru Thu, 18 Jul 2019 18:58:32 +0200 +llvm-toolchain-9 (1:9.0.1-12) UNRELEASED; urgency=medium + + * Cherry-pick upstream patch D74453 to fix atomic compare-and-swap on + riscv64. + + -- Jessica Clarke Wed, 01 Apr 2020 16:23:55 +0100 + llvm-toolchain-9 (1:9.0.1-11) unstable; urgency=medium * Allow one to build g++ 9 & 10 to fix a gcc build dependency diff --git a/debian/patches/D74453-riscv-atomic_cmp_xchg.diff b/debian/patches/D74453-riscv-atomic_cmp_xchg.diff new file mode 100644 index 00000000..32cc54c6 --- /dev/null +++ b/debian/patches/D74453-riscv-atomic_cmp_xchg.diff @@ -0,0 +1,189 @@ +From 616289ed29225c0ddfe5699c7fdf42a0fcbe0ab4 Mon Sep 17 00:00:00 2001 +From: Jessica Clarke +Date: Wed, 1 Apr 2020 15:50:47 +0100 +Subject: [PATCH] [LegalizeTypes][RISCV] Correctly sign-extend comparison for + ATOMIC_CMP_XCHG + +Summary: +Currently, the comparison argument used for ATOMIC_CMP_XCHG is legalised +with GetPromotedInteger, which leaves the upper bits of the value +undefind. Since this is used for comparing in an LR/SC loop with a +full-width comparison, we must sign extend it. We introduce a new +getExtendForAtomicCmpSwapArg to complement getExtendForAtomicOps, since +many targets have compare-and-swap instructions (or pseudos) that +correctly handle an any-extend input, and the existing function +determines the extension of the result, whereas we are concerned with +the input. + +This is related to https://reviews.llvm.org/D58829, which solved the +issue for ATOMIC_CMP_SWAP_WITH_SUCCESS, but not the simpler +ATOMIC_CMP_SWAP. + +Reviewers: asb, lenary, efriedma + +Reviewed By: asb + +Subscribers: arichardson, hiraditya, rbar, johnrusso, simoncook, sabuasal, niosHD, kito-cheng, shiva0217, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, jfb, PkmX, jocewei, psnobl, benna, Jim, s.egerton, pzheng, sameer.abuasal, apazos, luismarques, evandro, llvm-commits + +Tags: #llvm + +Differential Revision: https://reviews.llvm.org/D74453 +--- + llvm/include/llvm/CodeGen/TargetLowering.h | 12 ++++++++++++ + .../SelectionDAG/LegalizeIntegerTypes.cpp | 18 +++++++++++++++++- + llvm/lib/Target/RISCV/RISCVISelLowering.h | 4 ++++ + llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll | 10 ++++++++++ + 4 files changed, 43 insertions(+), 1 deletion(-) + +diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h +index fefa8daa60a1..99601c436651 100644 +--- a/llvm/include/llvm/CodeGen/TargetLowering.h ++++ b/llvm/include/llvm/CodeGen/TargetLowering.h +@@ -1962,6 +1962,18 @@ class TargetLoweringBase { + return ISD::ZERO_EXTEND; + } + ++ /// Returns how the platform's atomic compare and swap expects its comparison ++ /// value to be extended (ZERO_EXTEND, SIGN_EXTEND, or ANY_EXTEND). This is ++ /// separate from getExtendForAtomicOps, which is concerned with the ++ /// sign-extension of the instruction's output, whereas here we are concerned ++ /// with the sign-extension of the input. For targets with compare-and-swap ++ /// instructions (or sub-word comparisons in their LL/SC loop expansions), ++ /// the input can be ANY_EXTEND, but the output will still have a specific ++ /// extension. ++ virtual ISD::NodeType getExtendForAtomicCmpSwapArg() const { ++ return ISD::ANY_EXTEND; ++ } ++ + /// @} + + /// Returns true if we should normalize +diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp +index 0248b5121e3f..ed67f7dc8ea3 100644 +--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp ++++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp +@@ -278,8 +278,24 @@ SDValue DAGTypeLegalizer::PromoteIntRes_AtomicCmpSwap(AtomicSDNode *N, + return Res.getValue(1); + } + +- SDValue Op2 = GetPromotedInteger(N->getOperand(2)); ++ // Op2 is used for the comparison and thus must be extended according to the ++ // target's atomic operations. Op3 is merely stored and so can be left alone. ++ SDValue Op2 = N->getOperand(2); + SDValue Op3 = GetPromotedInteger(N->getOperand(3)); ++ switch (TLI.getExtendForAtomicCmpSwapArg()) { ++ case ISD::SIGN_EXTEND: ++ Op2 = SExtPromotedInteger(Op2); ++ break; ++ case ISD::ZERO_EXTEND: ++ Op2 = ZExtPromotedInteger(Op2); ++ break; ++ case ISD::ANY_EXTEND: ++ Op2 = GetPromotedInteger(Op2); ++ break; ++ default: ++ llvm_unreachable("Invalid atomic op extension"); ++ } ++ + SDVTList VTs = + DAG.getVTList(Op2.getValueType(), N->getValueType(1), MVT::Other); + SDValue Res = DAG.getAtomicCmpSwap( +diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.h b/llvm/lib/Target/RISCV/RISCVISelLowering.h +index 929169dd62d9..f76abf22e4db 100644 +--- a/llvm/lib/Target/RISCV/RISCVISelLowering.h ++++ b/llvm/lib/Target/RISCV/RISCVISelLowering.h +@@ -129,6 +129,10 @@ class RISCVTargetLowering : public TargetLowering { + return ISD::SIGN_EXTEND; + } + ++ ISD::NodeType getExtendForAtomicCmpSwapArg() const override { ++ return ISD::SIGN_EXTEND; ++ } ++ + bool shouldExpandShift(SelectionDAG &DAG, SDNode *N) const override { + if (DAG.getMachineFunction().getFunction().hasMinSize()) + return false; +diff --git a/llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll b/llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll +index 43da05ebe7c7..f2691ba1a771 100644 +--- a/llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll ++++ b/llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll +@@ -1628,6 +1628,7 @@ define void @cmpxchg_i32_monotonic_monotonic(i32* %ptr, i32 %cmp, i32 %val) noun + ; + ; RV64IA-LABEL: cmpxchg_i32_monotonic_monotonic: + ; RV64IA: # %bb.0: ++; RV64IA-NEXT: sext.w a1, a1 + ; RV64IA-NEXT: .LBB20_1: # =>This Inner Loop Header: Depth=1 + ; RV64IA-NEXT: lr.w a3, (a0) + ; RV64IA-NEXT: bne a3, a1, .LBB20_3 +@@ -1680,6 +1681,7 @@ define void @cmpxchg_i32_acquire_monotonic(i32* %ptr, i32 %cmp, i32 %val) nounwi + ; + ; RV64IA-LABEL: cmpxchg_i32_acquire_monotonic: + ; RV64IA: # %bb.0: ++; RV64IA-NEXT: sext.w a1, a1 + ; RV64IA-NEXT: .LBB21_1: # =>This Inner Loop Header: Depth=1 + ; RV64IA-NEXT: lr.w.aq a3, (a0) + ; RV64IA-NEXT: bne a3, a1, .LBB21_3 +@@ -1732,6 +1734,7 @@ define void @cmpxchg_i32_acquire_acquire(i32* %ptr, i32 %cmp, i32 %val) nounwind + ; + ; RV64IA-LABEL: cmpxchg_i32_acquire_acquire: + ; RV64IA: # %bb.0: ++; RV64IA-NEXT: sext.w a1, a1 + ; RV64IA-NEXT: .LBB22_1: # =>This Inner Loop Header: Depth=1 + ; RV64IA-NEXT: lr.w.aq a3, (a0) + ; RV64IA-NEXT: bne a3, a1, .LBB22_3 +@@ -1784,6 +1787,7 @@ define void @cmpxchg_i32_release_monotonic(i32* %ptr, i32 %cmp, i32 %val) nounwi + ; + ; RV64IA-LABEL: cmpxchg_i32_release_monotonic: + ; RV64IA: # %bb.0: ++; RV64IA-NEXT: sext.w a1, a1 + ; RV64IA-NEXT: .LBB23_1: # =>This Inner Loop Header: Depth=1 + ; RV64IA-NEXT: lr.w a3, (a0) + ; RV64IA-NEXT: bne a3, a1, .LBB23_3 +@@ -1836,6 +1840,7 @@ define void @cmpxchg_i32_release_acquire(i32* %ptr, i32 %cmp, i32 %val) nounwind + ; + ; RV64IA-LABEL: cmpxchg_i32_release_acquire: + ; RV64IA: # %bb.0: ++; RV64IA-NEXT: sext.w a1, a1 + ; RV64IA-NEXT: .LBB24_1: # =>This Inner Loop Header: Depth=1 + ; RV64IA-NEXT: lr.w a3, (a0) + ; RV64IA-NEXT: bne a3, a1, .LBB24_3 +@@ -1888,6 +1893,7 @@ define void @cmpxchg_i32_acq_rel_monotonic(i32* %ptr, i32 %cmp, i32 %val) nounwi + ; + ; RV64IA-LABEL: cmpxchg_i32_acq_rel_monotonic: + ; RV64IA: # %bb.0: ++; RV64IA-NEXT: sext.w a1, a1 + ; RV64IA-NEXT: .LBB25_1: # =>This Inner Loop Header: Depth=1 + ; RV64IA-NEXT: lr.w.aq a3, (a0) + ; RV64IA-NEXT: bne a3, a1, .LBB25_3 +@@ -1940,6 +1946,7 @@ define void @cmpxchg_i32_acq_rel_acquire(i32* %ptr, i32 %cmp, i32 %val) nounwind + ; + ; RV64IA-LABEL: cmpxchg_i32_acq_rel_acquire: + ; RV64IA: # %bb.0: ++; RV64IA-NEXT: sext.w a1, a1 + ; RV64IA-NEXT: .LBB26_1: # =>This Inner Loop Header: Depth=1 + ; RV64IA-NEXT: lr.w.aq a3, (a0) + ; RV64IA-NEXT: bne a3, a1, .LBB26_3 +@@ -1992,6 +1999,7 @@ define void @cmpxchg_i32_seq_cst_monotonic(i32* %ptr, i32 %cmp, i32 %val) nounwi + ; + ; RV64IA-LABEL: cmpxchg_i32_seq_cst_monotonic: + ; RV64IA: # %bb.0: ++; RV64IA-NEXT: sext.w a1, a1 + ; RV64IA-NEXT: .LBB27_1: # =>This Inner Loop Header: Depth=1 + ; RV64IA-NEXT: lr.w.aqrl a3, (a0) + ; RV64IA-NEXT: bne a3, a1, .LBB27_3 +@@ -2044,6 +2052,7 @@ define void @cmpxchg_i32_seq_cst_acquire(i32* %ptr, i32 %cmp, i32 %val) nounwind + ; + ; RV64IA-LABEL: cmpxchg_i32_seq_cst_acquire: + ; RV64IA: # %bb.0: ++; RV64IA-NEXT: sext.w a1, a1 + ; RV64IA-NEXT: .LBB28_1: # =>This Inner Loop Header: Depth=1 + ; RV64IA-NEXT: lr.w.aqrl a3, (a0) + ; RV64IA-NEXT: bne a3, a1, .LBB28_3 +@@ -2096,6 +2105,7 @@ define void @cmpxchg_i32_seq_cst_seq_cst(i32* %ptr, i32 %cmp, i32 %val) nounwind + ; + ; RV64IA-LABEL: cmpxchg_i32_seq_cst_seq_cst: + ; RV64IA: # %bb.0: ++; RV64IA-NEXT: sext.w a1, a1 + ; RV64IA-NEXT: .LBB29_1: # =>This Inner Loop Header: Depth=1 + ; RV64IA-NEXT: lr.w.aqrl a3, (a0) + ; RV64IA-NEXT: bne a3, a1, .LBB29_3 diff --git a/debian/patches/series b/debian/patches/series index 4eaaeebe..3227ab24 100644 --- a/debian/patches/series +++ b/debian/patches/series @@ -126,6 +126,7 @@ bootstrap-fix-include-next.diff # riscv64 clang-riscv64-multiarch.diff +D74453-riscv-atomic_cmp_xchg.diff # Compiler-rt - workaround workaround-bug-42994-use-linker.diff From e201f63da5f35e9a2715d1aa0905645d17a693ae Mon Sep 17 00:00:00 2001 From: Sylvestre Ledru Date: Thu, 2 Apr 2020 10:44:29 +0200 Subject: [PATCH 07/21] rebase of the patch --- .../patches/D74453-riscv-atomic_cmp_xchg.diff | 58 +++++++++---------- 1 file changed, 29 insertions(+), 29 deletions(-) diff --git a/debian/patches/D74453-riscv-atomic_cmp_xchg.diff b/debian/patches/D74453-riscv-atomic_cmp_xchg.diff index 32cc54c6..6fc71c0f 100644 --- a/debian/patches/D74453-riscv-atomic_cmp_xchg.diff +++ b/debian/patches/D74453-riscv-atomic_cmp_xchg.diff @@ -35,11 +35,11 @@ Differential Revision: https://reviews.llvm.org/D74453 llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll | 10 ++++++++++ 4 files changed, 43 insertions(+), 1 deletion(-) -diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h -index fefa8daa60a1..99601c436651 100644 ---- a/llvm/include/llvm/CodeGen/TargetLowering.h -+++ b/llvm/include/llvm/CodeGen/TargetLowering.h -@@ -1962,6 +1962,18 @@ class TargetLoweringBase { +Index: llvm-toolchain-10-10.0.0/llvm/include/llvm/CodeGen/TargetLowering.h +=================================================================== +--- llvm-toolchain-10-10.0.0.orig/llvm/include/llvm/CodeGen/TargetLowering.h ++++ llvm-toolchain-10-10.0.0/llvm/include/llvm/CodeGen/TargetLowering.h +@@ -1861,6 +1861,18 @@ public: return ISD::ZERO_EXTEND; } @@ -58,11 +58,11 @@ index fefa8daa60a1..99601c436651 100644 /// @} /// Returns true if we should normalize -diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp -index 0248b5121e3f..ed67f7dc8ea3 100644 ---- a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp -+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp -@@ -278,8 +278,24 @@ SDValue DAGTypeLegalizer::PromoteIntRes_AtomicCmpSwap(AtomicSDNode *N, +Index: llvm-toolchain-10-10.0.0/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp +=================================================================== +--- llvm-toolchain-10-10.0.0.orig/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp ++++ llvm-toolchain-10-10.0.0/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp +@@ -271,8 +271,24 @@ SDValue DAGTypeLegalizer::PromoteIntRes_ return Res.getValue(1); } @@ -88,11 +88,11 @@ index 0248b5121e3f..ed67f7dc8ea3 100644 SDVTList VTs = DAG.getVTList(Op2.getValueType(), N->getValueType(1), MVT::Other); SDValue Res = DAG.getAtomicCmpSwap( -diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.h b/llvm/lib/Target/RISCV/RISCVISelLowering.h -index 929169dd62d9..f76abf22e4db 100644 ---- a/llvm/lib/Target/RISCV/RISCVISelLowering.h -+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.h -@@ -129,6 +129,10 @@ class RISCVTargetLowering : public TargetLowering { +Index: llvm-toolchain-10-10.0.0/llvm/lib/Target/RISCV/RISCVISelLowering.h +=================================================================== +--- llvm-toolchain-10-10.0.0.orig/llvm/lib/Target/RISCV/RISCVISelLowering.h ++++ llvm-toolchain-10-10.0.0/llvm/lib/Target/RISCV/RISCVISelLowering.h +@@ -127,6 +127,10 @@ public: return ISD::SIGN_EXTEND; } @@ -103,11 +103,11 @@ index 929169dd62d9..f76abf22e4db 100644 bool shouldExpandShift(SelectionDAG &DAG, SDNode *N) const override { if (DAG.getMachineFunction().getFunction().hasMinSize()) return false; -diff --git a/llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll b/llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll -index 43da05ebe7c7..f2691ba1a771 100644 ---- a/llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll -+++ b/llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll -@@ -1628,6 +1628,7 @@ define void @cmpxchg_i32_monotonic_monotonic(i32* %ptr, i32 %cmp, i32 %val) noun +Index: llvm-toolchain-10-10.0.0/llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll +=================================================================== +--- llvm-toolchain-10-10.0.0.orig/llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll ++++ llvm-toolchain-10-10.0.0/llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll +@@ -1628,6 +1628,7 @@ define void @cmpxchg_i32_monotonic_monot ; ; RV64IA-LABEL: cmpxchg_i32_monotonic_monotonic: ; RV64IA: # %bb.0: @@ -115,7 +115,7 @@ index 43da05ebe7c7..f2691ba1a771 100644 ; RV64IA-NEXT: .LBB20_1: # =>This Inner Loop Header: Depth=1 ; RV64IA-NEXT: lr.w a3, (a0) ; RV64IA-NEXT: bne a3, a1, .LBB20_3 -@@ -1680,6 +1681,7 @@ define void @cmpxchg_i32_acquire_monotonic(i32* %ptr, i32 %cmp, i32 %val) nounwi +@@ -1680,6 +1681,7 @@ define void @cmpxchg_i32_acquire_monoton ; ; RV64IA-LABEL: cmpxchg_i32_acquire_monotonic: ; RV64IA: # %bb.0: @@ -123,7 +123,7 @@ index 43da05ebe7c7..f2691ba1a771 100644 ; RV64IA-NEXT: .LBB21_1: # =>This Inner Loop Header: Depth=1 ; RV64IA-NEXT: lr.w.aq a3, (a0) ; RV64IA-NEXT: bne a3, a1, .LBB21_3 -@@ -1732,6 +1734,7 @@ define void @cmpxchg_i32_acquire_acquire(i32* %ptr, i32 %cmp, i32 %val) nounwind +@@ -1732,6 +1734,7 @@ define void @cmpxchg_i32_acquire_acquire ; ; RV64IA-LABEL: cmpxchg_i32_acquire_acquire: ; RV64IA: # %bb.0: @@ -131,7 +131,7 @@ index 43da05ebe7c7..f2691ba1a771 100644 ; RV64IA-NEXT: .LBB22_1: # =>This Inner Loop Header: Depth=1 ; RV64IA-NEXT: lr.w.aq a3, (a0) ; RV64IA-NEXT: bne a3, a1, .LBB22_3 -@@ -1784,6 +1787,7 @@ define void @cmpxchg_i32_release_monotonic(i32* %ptr, i32 %cmp, i32 %val) nounwi +@@ -1784,6 +1787,7 @@ define void @cmpxchg_i32_release_monoton ; ; RV64IA-LABEL: cmpxchg_i32_release_monotonic: ; RV64IA: # %bb.0: @@ -139,7 +139,7 @@ index 43da05ebe7c7..f2691ba1a771 100644 ; RV64IA-NEXT: .LBB23_1: # =>This Inner Loop Header: Depth=1 ; RV64IA-NEXT: lr.w a3, (a0) ; RV64IA-NEXT: bne a3, a1, .LBB23_3 -@@ -1836,6 +1840,7 @@ define void @cmpxchg_i32_release_acquire(i32* %ptr, i32 %cmp, i32 %val) nounwind +@@ -1836,6 +1840,7 @@ define void @cmpxchg_i32_release_acquire ; ; RV64IA-LABEL: cmpxchg_i32_release_acquire: ; RV64IA: # %bb.0: @@ -147,7 +147,7 @@ index 43da05ebe7c7..f2691ba1a771 100644 ; RV64IA-NEXT: .LBB24_1: # =>This Inner Loop Header: Depth=1 ; RV64IA-NEXT: lr.w a3, (a0) ; RV64IA-NEXT: bne a3, a1, .LBB24_3 -@@ -1888,6 +1893,7 @@ define void @cmpxchg_i32_acq_rel_monotonic(i32* %ptr, i32 %cmp, i32 %val) nounwi +@@ -1888,6 +1893,7 @@ define void @cmpxchg_i32_acq_rel_monoton ; ; RV64IA-LABEL: cmpxchg_i32_acq_rel_monotonic: ; RV64IA: # %bb.0: @@ -155,7 +155,7 @@ index 43da05ebe7c7..f2691ba1a771 100644 ; RV64IA-NEXT: .LBB25_1: # =>This Inner Loop Header: Depth=1 ; RV64IA-NEXT: lr.w.aq a3, (a0) ; RV64IA-NEXT: bne a3, a1, .LBB25_3 -@@ -1940,6 +1946,7 @@ define void @cmpxchg_i32_acq_rel_acquire(i32* %ptr, i32 %cmp, i32 %val) nounwind +@@ -1940,6 +1946,7 @@ define void @cmpxchg_i32_acq_rel_acquire ; ; RV64IA-LABEL: cmpxchg_i32_acq_rel_acquire: ; RV64IA: # %bb.0: @@ -163,7 +163,7 @@ index 43da05ebe7c7..f2691ba1a771 100644 ; RV64IA-NEXT: .LBB26_1: # =>This Inner Loop Header: Depth=1 ; RV64IA-NEXT: lr.w.aq a3, (a0) ; RV64IA-NEXT: bne a3, a1, .LBB26_3 -@@ -1992,6 +1999,7 @@ define void @cmpxchg_i32_seq_cst_monotonic(i32* %ptr, i32 %cmp, i32 %val) nounwi +@@ -1992,6 +1999,7 @@ define void @cmpxchg_i32_seq_cst_monoton ; ; RV64IA-LABEL: cmpxchg_i32_seq_cst_monotonic: ; RV64IA: # %bb.0: @@ -171,7 +171,7 @@ index 43da05ebe7c7..f2691ba1a771 100644 ; RV64IA-NEXT: .LBB27_1: # =>This Inner Loop Header: Depth=1 ; RV64IA-NEXT: lr.w.aqrl a3, (a0) ; RV64IA-NEXT: bne a3, a1, .LBB27_3 -@@ -2044,6 +2052,7 @@ define void @cmpxchg_i32_seq_cst_acquire(i32* %ptr, i32 %cmp, i32 %val) nounwind +@@ -2044,6 +2052,7 @@ define void @cmpxchg_i32_seq_cst_acquire ; ; RV64IA-LABEL: cmpxchg_i32_seq_cst_acquire: ; RV64IA: # %bb.0: @@ -179,7 +179,7 @@ index 43da05ebe7c7..f2691ba1a771 100644 ; RV64IA-NEXT: .LBB28_1: # =>This Inner Loop Header: Depth=1 ; RV64IA-NEXT: lr.w.aqrl a3, (a0) ; RV64IA-NEXT: bne a3, a1, .LBB28_3 -@@ -2096,6 +2105,7 @@ define void @cmpxchg_i32_seq_cst_seq_cst(i32* %ptr, i32 %cmp, i32 %val) nounwind +@@ -2096,6 +2105,7 @@ define void @cmpxchg_i32_seq_cst_seq_cst ; ; RV64IA-LABEL: cmpxchg_i32_seq_cst_seq_cst: ; RV64IA: # %bb.0: From 49bd63862a0e9d4e5eabbcf46be58160171c5cd0 Mon Sep 17 00:00:00 2001 From: Sylvestre Ledru Date: Thu, 2 Apr 2020 21:48:18 +0200 Subject: [PATCH 08/21] Cherry-pick upstream patch D74453 to fix atomic compare-and-swap on riscv64. --- debian/changelog | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/debian/changelog b/debian/changelog index 8a3ea16a..381c9048 100644 --- a/debian/changelog +++ b/debian/changelog @@ -1,3 +1,11 @@ +llvm-toolchain-10 (1:10.0.0-3) unstable; urgency=medium + + [ Jessica Clarke ] + * Cherry-pick upstream patch D74453 to fix atomic compare-and-swap on + riscv64. + + -- Sylvestre Ledru Thu, 02 Apr 2020 21:48:13 +0200 + llvm-toolchain-10 (1:10.0.0-2) unstable; urgency=medium [ Dimitri John Ledkov ] From bb359b01c15d03c13cbd931aea14b94aaaec2526 Mon Sep 17 00:00:00 2001 From: Sylvestre Ledru Date: Fri, 3 Apr 2020 10:14:11 +0200 Subject: [PATCH 09/21] ppc64el/autopkgtest: Just like with arm64, ignore two tests --- debian/changelog | 2 ++ debian/qualify-clang.sh | 6 +++--- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/debian/changelog b/debian/changelog index 381c9048..9760a758 100644 --- a/debian/changelog +++ b/debian/changelog @@ -1,5 +1,7 @@ llvm-toolchain-10 (1:10.0.0-3) unstable; urgency=medium + * ppc64el/autopkgtest: Just like with arm64, ignore two tests + [ Jessica Clarke ] * Cherry-pick upstream patch D74453 to fix atomic compare-and-swap on riscv64. diff --git a/debian/qualify-clang.sh b/debian/qualify-clang.sh index 55e5d585..f9208af4 100755 --- a/debian/qualify-clang.sh +++ b/debian/qualify-clang.sh @@ -299,7 +299,7 @@ if test $NBLINES -lt 100; then exit 42 fi -if [ $DEB_HOST_ARCH != "arm64" ]; then +if [ $DEB_HOST_ARCH != "arm64" -a $DEB_HOST_ARCH != "ppc64el" ]; then # Fails on arm64 with # /usr/lib/llvm-10/lib/clang/10.0.0/include/mmintrin.h:33:5: error: use of undeclared identifier '__builtin_ia32_emms'; did you mean '__builtin_isless'? echo '#include ' > foo.cc @@ -768,8 +768,8 @@ if ! grep "No such file or directory" foo.log; then if ! ./a.out 2>&1 | grep -q -E "(Test unit written|PreferSmall)"; then echo "fuzzer. Output:" ./a.out || true - if [ $DEB_HOST_ARCH != "arm64" ]; then - # Don't fail on arm64 + if [ $DEB_HOST_ARCH != "arm64" -a $DEB_HOST_ARCH != "ppc64el" ]; then + # Don't fail on arm64 and ppc64el exit 42 fi fi From c6c5dab79f53184d06424dbd4f63f638e186ef33 Mon Sep 17 00:00:00 2001 From: Gianfranco Costamagna Date: Mon, 6 Apr 2020 15:25:12 +0200 Subject: [PATCH 10/21] Add multilib riscv64 patch from Ubuntu --- debian/changelog | 7 +++ debian/patches/riscv64-multilib-empty.patch | 57 +++++++++++++++++++++ debian/patches/series | 1 + 3 files changed, 65 insertions(+) create mode 100644 debian/patches/riscv64-multilib-empty.patch diff --git a/debian/changelog b/debian/changelog index 9760a758..8b8f5def 100644 --- a/debian/changelog +++ b/debian/changelog @@ -6,6 +6,13 @@ llvm-toolchain-10 (1:10.0.0-3) unstable; urgency=medium * Cherry-pick upstream patch D74453 to fix atomic compare-and-swap on riscv64. + [ William Grant ] + * debian/patches/riscv64-multilib-empty.patch: Adjust riscv64 GCC detector + to also check for existence of crtbegin.o in the default multilib dir, + like most other ports. Fixes FTBFS on riscv64, since on Ubuntu + /usr/lib/gcc/riscv64-linux-gnu/10 exists but is empty (gcc-10-base is + installed, but libgcc-10-dev is not). + -- Sylvestre Ledru Thu, 02 Apr 2020 21:48:13 +0200 llvm-toolchain-10 (1:10.0.0-2) unstable; urgency=medium diff --git a/debian/patches/riscv64-multilib-empty.patch b/debian/patches/riscv64-multilib-empty.patch new file mode 100644 index 00000000..3a9fdf76 --- /dev/null +++ b/debian/patches/riscv64-multilib-empty.patch @@ -0,0 +1,57 @@ +Index: llvm-toolchain-10-10.0.0/clang/lib/Driver/ToolChains/Gnu.cpp +=================================================================== +--- llvm-toolchain-10-10.0.0.orig/clang/lib/Driver/ToolChains/Gnu.cpp ++++ llvm-toolchain-10-10.0.0/clang/lib/Driver/ToolChains/Gnu.cpp +@@ -1570,13 +1570,16 @@ static void findRISCVBareMetalMultilibs( + Result.Multilibs = RISCVMultilibs; + } + +-static void findRISCVMultilibs(const Driver &D, ++static bool findRISCVMultilibs(const Driver &D, + const llvm::Triple &TargetTriple, StringRef Path, + const ArgList &Args, DetectedMultilibs &Result) { +- if (TargetTriple.getOS() == llvm::Triple::UnknownOS) +- return findRISCVBareMetalMultilibs(D, TargetTriple, Path, Args, Result); ++ if (TargetTriple.getOS() == llvm::Triple::UnknownOS) { ++ findRISCVBareMetalMultilibs(D, TargetTriple, Path, Args, Result); ++ return true; ++ } + + FilterNonExistent NonExistent(Path, "/crtbegin.o", D.getVFS()); ++ Multilib Default; + Multilib Ilp32 = makeMultilib("lib32/ilp32").flag("+m32").flag("+mabi=ilp32"); + Multilib Ilp32f = + makeMultilib("lib32/ilp32f").flag("+m32").flag("+mabi=ilp32f"); +@@ -1587,7 +1590,7 @@ static void findRISCVMultilibs(const Dri + Multilib Lp64d = makeMultilib("lib64/lp64d").flag("+m64").flag("+mabi=lp64d"); + MultilibSet RISCVMultilibs = + MultilibSet() +- .Either({Ilp32, Ilp32f, Ilp32d, Lp64, Lp64f, Lp64d}) ++ .Either({Default, Ilp32, Ilp32f, Ilp32d, Lp64, Lp64f, Lp64d}) + .FilterOut(NonExistent); + + Multilib::flags_list Flags; +@@ -1603,8 +1606,11 @@ static void findRISCVMultilibs(const Dri + addMultilibFlag(ABIName == "lp64f", "mabi=lp64f", Flags); + addMultilibFlag(ABIName == "lp64d", "mabi=lp64d", Flags); + +- if (RISCVMultilibs.select(Flags, Result.SelectedMultilib)) +- Result.Multilibs = RISCVMultilibs; ++ if (!RISCVMultilibs.select(Flags, Result.SelectedMultilib)) ++ return false; ++ ++ Result.Multilibs = RISCVMultilibs; ++ return true; + } + + static bool findBiarchMultilibs(const Driver &D, +@@ -2382,7 +2388,8 @@ bool Generic_GCC::GCCInstallationDetecto + if (!findMIPSMultilibs(D, TargetTriple, Path, Args, Detected)) + return false; + } else if (TargetTriple.isRISCV()) { +- findRISCVMultilibs(D, TargetTriple, Path, Args, Detected); ++ if (!findRISCVMultilibs(D, TargetTriple, Path, Args, Detected)) ++ return false; + } else if (isMSP430(TargetArch)) { + findMSP430Multilibs(D, TargetTriple, Path, Args, Detected); + } else if (TargetArch == llvm::Triple::avr) { diff --git a/debian/patches/series b/debian/patches/series index 3227ab24..2eed081b 100644 --- a/debian/patches/series +++ b/debian/patches/series @@ -145,3 +145,4 @@ d21664cce1db8debe2528f36b1fbd2b8af9c9401.patch 0001-systemz-allow-configuring-default-SYSTEMZ_DEFAULT_AR.patch D76596.diff +riscv64-multilib-empty.patch From fee5882c021b89a2b5427aa55290136b7cd34812 Mon Sep 17 00:00:00 2001 From: Sylvestre Ledru Date: Thu, 9 Apr 2020 13:59:00 +0200 Subject: [PATCH 11/21] path moved --- debian/copyright | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/debian/copyright b/debian/copyright index a10fed28..51bc147e 100644 --- a/debian/copyright +++ b/debian/copyright @@ -116,7 +116,7 @@ License: Apple Please see the License for the specific language governing rights and limitations under the License. -Files: utils/unittest/googletest/* +Files: llvm/utils/unittest/googletest/* Copyright: 2006-2008, Google Inc. License: BSD-3-Clause From 2ef608a4f6812ee87b8666d7fd5a8526e9e8cf8c Mon Sep 17 00:00:00 2001 From: Sylvestre Ledru Date: Thu, 9 Apr 2020 14:00:09 +0200 Subject: [PATCH 12/21] add googlemock license --- debian/copyright | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/debian/copyright b/debian/copyright index 51bc147e..0e96fe60 100644 --- a/debian/copyright +++ b/debian/copyright @@ -120,6 +120,10 @@ Files: llvm/utils/unittest/googletest/* Copyright: 2006-2008, Google Inc. License: BSD-3-Clause +Files: llvm/utils/unittest/googlemock/* +Copyright: 2008, Google Inc. +License: BSD-3-Clause + Files: libcxx/* Copyright: 2009-2019 License: BSD-3-Clause From 976216148e9340094dd1d21535bdb6146772f4d8 Mon Sep 17 00:00:00 2001 From: Sylvestre Ledru Date: Thu, 9 Apr 2020 14:01:21 +0200 Subject: [PATCH 13/21] YAMLParser license: update of the path --- debian/copyright | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/debian/copyright b/debian/copyright index 0e96fe60..adbdb626 100644 --- a/debian/copyright +++ b/debian/copyright @@ -94,7 +94,7 @@ Files: polly/tools/GPURuntime/* Copyright: Polly Team License: U-OF-I-BSD-LIKE or MIT -Files: test/YAMLParser/* +Files: llvm/llvmtest/YAMLParser/* Copyright: 2006 Kirill Simonov License: MIT From 0fee4c19f0f742ae35d1414c6d5649cf64d20698 Mon Sep 17 00:00:00 2001 From: Sylvestre Ledru Date: Thu, 9 Apr 2020 14:17:46 +0200 Subject: [PATCH 14/21] license: clang/lib/Headers/cuda_wrappers/* --- debian/copyright | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/debian/copyright b/debian/copyright index adbdb626..ae99723d 100644 --- a/debian/copyright +++ b/debian/copyright @@ -124,6 +124,27 @@ Files: llvm/utils/unittest/googlemock/* Copyright: 2008, Google Inc. License: BSD-3-Clause +Files: clang/lib/Headers/cuda_wrappers/* +Copyright: 2016-2020, Google Inc. + Permission is hereby granted, free of charge, to any person obtaining a copy + of this software and associated documentation files (the "Software"), to deal + in the Software without restriction, including without limitation the rights + to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + copies of the Software, and to permit persons to whom the Software is + furnished to do so, subject to the following conditions: + . + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + . + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + THE SOFTWARE. + + Files: libcxx/* Copyright: 2009-2019 License: BSD-3-Clause From a2163de6804bd01b8cee4d68e8587cdb0ef40cfa Mon Sep 17 00:00:00 2001 From: Sylvestre Ledru Date: Thu, 9 Apr 2020 14:18:11 +0200 Subject: [PATCH 15/21] license: remove nickname --- debian/copyright | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/debian/copyright b/debian/copyright index ae99723d..3eaaf953 100644 --- a/debian/copyright +++ b/debian/copyright @@ -50,7 +50,7 @@ Copyright: 1992, 1993, 1994 Henry Spencer License: BSD-3-clause Files: lib/Support/MD5.cpp llvm/include/llvm/Support/MD5.h -Copyright: 2001 Alexander Peslyak aka Solar Designer +Copyright: 2001 Alexander Peslyak License: solar-public-domain This software was written by Alexander Peslyak in 2001. No copyright is claimed, and the software is hereby placed in the public domain. From fa1a030853f65b37d65befa0309f782ca6208796 Mon Sep 17 00:00:00 2001 From: Sylvestre Ledru Date: Thu, 9 Apr 2020 14:23:24 +0200 Subject: [PATCH 16/21] license: fix clang headers --- debian/copyright | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/debian/copyright b/debian/copyright index 3eaaf953..d6497386 100644 --- a/debian/copyright +++ b/debian/copyright @@ -24,10 +24,6 @@ License: APACHE-2-LLVM-EXCEPTIONS the License, but only in their entirety and only with respect to the Combined Software. -Files: clang/lib/Headers/* -Copyright: 2003-2007 University of Illinois at Urbana-Champaign -License: Expat - Files: compiler-rt/lib/BlocksRuntime/Block.h Copyright: 2008-2010 Apple, Inc. License: MIT @@ -125,6 +121,8 @@ Copyright: 2008, Google Inc. License: BSD-3-Clause Files: clang/lib/Headers/cuda_wrappers/* + clang/lib/Headers/avx512vlvp2intersectintrin.h + clang/lib/Headers/avx512vp2intersectintrin.h Copyright: 2016-2020, Google Inc. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal From ecd8f921a1ca352f2e3a0f6073ddf49ab106b981 Mon Sep 17 00:00:00 2001 From: Sylvestre Ledru Date: Thu, 9 Apr 2020 14:25:45 +0200 Subject: [PATCH 17/21] license: libcxx is released under the apache2 license like the rest --- debian/copyright | 20 -------------------- 1 file changed, 20 deletions(-) diff --git a/debian/copyright b/debian/copyright index d6497386..6728a33a 100644 --- a/debian/copyright +++ b/debian/copyright @@ -143,26 +143,6 @@ Copyright: 2016-2020, Google Inc. THE SOFTWARE. -Files: libcxx/* -Copyright: 2009-2019 -License: BSD-3-Clause - This software is provided 'as-is', without any express or implied - warranty. In no event will the authors be held liable for any damages - arising from the use of this software. - . - Permission is granted to anyone to use this software for any purpose, - including commercial applications, and to alter it and redistribute it - freely, subject to the following restrictions: - . - 1. The origin of this software must not be misrepresented; you must not - claim that you wrote the original software. If you use this software - in a product, an acknowledgment in the product documentation would be - appreciated but is not required. - 2. Altered source versions must be plainly marked as such, and must not be - misrepresented as being the original software. - 3. This notice may not be removed or altered from any source distribution. - - License: MIT Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal From d14ec38cde7ec4a3a63b27166dbc597296e4acba Mon Sep 17 00:00:00 2001 From: Sylvestre Ledru Date: Thu, 9 Apr 2020 14:26:42 +0200 Subject: [PATCH 18/21] license: remove polly/tools/GPURuntime/ --- debian/copyright | 4 ---- 1 file changed, 4 deletions(-) diff --git a/debian/copyright b/debian/copyright index 6728a33a..9814b5ea 100644 --- a/debian/copyright +++ b/debian/copyright @@ -86,10 +86,6 @@ License: public-domain polly/lib/JSON/LICENSE.txt claims that these files are in the public domain, but the machine-readable copyright spec requires additional clarification. -Files: polly/tools/GPURuntime/* -Copyright: Polly Team -License: U-OF-I-BSD-LIKE or MIT - Files: llvm/llvmtest/YAMLParser/* Copyright: 2006 Kirill Simonov License: MIT From 16127ba30b6aeaf805c0b26be34c0b8301bb3524 Mon Sep 17 00:00:00 2001 From: Sylvestre Ledru Date: Thu, 9 Apr 2020 14:28:45 +0200 Subject: [PATCH 19/21] license: some paths moved --- debian/copyright | 13 +++---------- 1 file changed, 3 insertions(+), 10 deletions(-) diff --git a/debian/copyright b/debian/copyright index 9814b5ea..41567490 100644 --- a/debian/copyright +++ b/debian/copyright @@ -40,12 +40,12 @@ Files: compiler-rt/lib/BlocksRuntime/runtime.c Copyright: 2008-2010 Apple, Inc. License: MIT -Files: lib/Support/reg* +Files: llvm/lib/Support/reg* Copyright: 1992, 1993, 1994 Henry Spencer 1992, 1993, 1994 The Regents of the University of California License: BSD-3-clause -Files: lib/Support/MD5.cpp llvm/include/llvm/Support/MD5.h +Files: llvm/lib/Support/MD5.cpp llvm/include/llvm/Support/MD5.h Copyright: 2001 Alexander Peslyak License: solar-public-domain This software was written by Alexander Peslyak in 2001. No copyright is @@ -60,7 +60,7 @@ License: solar-public-domain . * There's ABSOLUTELY NO WARRANTY, express or implied. -Files: lldb/test/unittest2/* +Files: lldb/third_party/Python/module/unittest2* Copyright: 1999-2003 Steve Purcell 2003-2010 Python Software Foundation License: Python @@ -79,13 +79,6 @@ License: Python AND THERE IS NO OBLIGATION WHATSOEVER TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. -Files: polly/lib/JSON/* -Copyright: Polly Team -License: public-domain - **FIXME** - polly/lib/JSON/LICENSE.txt claims that these files are in the public domain, but - the machine-readable copyright spec requires additional clarification. - Files: llvm/llvmtest/YAMLParser/* Copyright: 2006 Kirill Simonov License: MIT From ec51503624c3224de4425313cbf05cfa48778bad Mon Sep 17 00:00:00 2001 From: Sylvestre Ledru Date: Thu, 9 Apr 2020 14:35:00 +0200 Subject: [PATCH 20/21] license: merge some license --- debian/copyright | 33 ++------------------------------- 1 file changed, 2 insertions(+), 31 deletions(-) diff --git a/debian/copyright b/debian/copyright index 41567490..ad7fdbf9 100644 --- a/debian/copyright +++ b/debian/copyright @@ -24,19 +24,8 @@ License: APACHE-2-LLVM-EXCEPTIONS the License, but only in their entirety and only with respect to the Combined Software. -Files: compiler-rt/lib/BlocksRuntime/Block.h -Copyright: 2008-2010 Apple, Inc. -License: MIT - -Files: compiler-rt/lib/BlocksRuntime/Block_private.h -Copyright: 2008-2010 Apple, Inc. -License: MIT - -Files: compiler-rt/lib/BlocksRuntime/data.c -Copyright: 2008-2010 Apple, Inc. -License: MIT - -Files: compiler-rt/lib/BlocksRuntime/runtime.c +Files: compiler-rt/lib/BlocksRuntime/* + lldb/tools/debugserver/source/MacOSX/stack_logging.h Copyright: 2008-2010 Apple, Inc. License: MIT @@ -83,24 +72,6 @@ Files: llvm/llvmtest/YAMLParser/* Copyright: 2006 Kirill Simonov License: MIT -Files: lldb/tools/debugserver/source/MacOSX/stack_logging.h -Copyright: 1999-2007 Apple Inc. -License: Apple - This file contains Original Code and/or Modifications of Original Code - as defined in and that are subject to the Apple Public Source License - Version 2.0 (the 'License'). You may not use this file except in - compliance with the License. Please obtain a copy of the License at - http://www.opensource.apple.com/apsl/ and read it before using this - file. - . - The Original Code and all software distributed under the License are - distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER - EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, - INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, - FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. - Please see the License for the specific language governing rights and - limitations under the License. - Files: llvm/utils/unittest/googletest/* Copyright: 2006-2008, Google Inc. License: BSD-3-Clause From be68e8fc7c72e5ee0eb56b410566527a7577a11e Mon Sep 17 00:00:00 2001 From: Sylvestre Ledru Date: Thu, 9 Apr 2020 14:35:12 +0200 Subject: [PATCH 21/21] Update the copyright file with recent changes (Closes: #956287) Thanks to Michael Lustfield for the detective work --- debian/changelog | 2 ++ 1 file changed, 2 insertions(+) diff --git a/debian/changelog b/debian/changelog index 8b8f5def..45d8a558 100644 --- a/debian/changelog +++ b/debian/changelog @@ -1,6 +1,8 @@ llvm-toolchain-10 (1:10.0.0-3) unstable; urgency=medium * ppc64el/autopkgtest: Just like with arm64, ignore two tests + * Update the copyright file with recent changes (Closes: #956287) + Thanks to Michael Lustfield for the detective work [ Jessica Clarke ] * Cherry-pick upstream patch D74453 to fix atomic compare-and-swap on