From 22f7b3efb88936e41bcd9717506d44383ca19b29 Mon Sep 17 00:00:00 2001 From: Sylvestre Ledru Date: Thu, 6 Jun 2013 15:30:43 +0000 Subject: [PATCH] introduce also cpp11-migrate as a new package --- debian/control | 26 ++- debian/cpp11-migrate-3.3.install | 2 + debian/cpp11-migrate-3.3.manpages | 1 + debian/man/cpp11-migrate-3.3.1 | 256 ++++++++++++++++++++++++++++++ 4 files changed, 280 insertions(+), 5 deletions(-) create mode 100644 debian/cpp11-migrate-3.3.install create mode 100644 debian/cpp11-migrate-3.3.manpages create mode 100644 debian/man/cpp11-migrate-3.3.1 diff --git a/debian/control b/debian/control index 9dd8cfe4..05206c8d 100644 --- a/debian/control +++ b/debian/control @@ -56,14 +56,30 @@ Depends: ${shlibs:Depends}, ${misc:Depends} Replaces: clang-format-3.4 Breaks: clang-format-3.4 Description: Tool to format C/C++/Obj-C code - Clang-format is both a library and a stand-alone tool with the goal of automatically reformatting C++ - sources files according to configurable style guides. To do so, clang-format uses Clang's Lexer to - transform an input file into a token stream and then changes all the whitespace around those tokens. The - goal is for clang-format to both serve both as a user tool (ideally with powerful IDE integrations) and - part of other refactoring tools, e.g. to do a reformatting of all the lines changed during a renaming. + Clang-format is both a library and a stand-alone tool with the goal of + automatically reformatting C++ sources files according to configurable + style guides. To do so, clang-format uses Clang's Lexer to transform an + input file into a token stream and then changes all the whitespace around + those tokens. The goal is for clang-format to both serve both as a user + tool (ideally with powerful IDE integrations) and part of other + refactoring tools, e.g. to do a reformatting of all the lines changed + during a renaming. . This package also provides vim and emacs plugins. +Package: cpp11-migrate-3.3 +Architecture: any +Depends: ${shlibs:Depends}, ${misc:Depends} +Replaces: cpp11-migrate-3.4 +Breaks: cpp11-migrate-3.4 +Description: Tool to convert C++98 and C++03 code to C++11 + The purpose of the C++11 Migrator is to do source-to-source translation to + migrate existing C++ code to use C++11 features to enhance + maintainability, readability, runtime performance, and compile-time + performance. Development is still early and transforms fall mostly into + the first two categories. The migrator is based on Clang's LibTooling and + the AST Matching library. + Package: clang-3.3-doc Architecture: all Section: doc diff --git a/debian/cpp11-migrate-3.3.install b/debian/cpp11-migrate-3.3.install new file mode 100644 index 00000000..2458f502 --- /dev/null +++ b/debian/cpp11-migrate-3.3.install @@ -0,0 +1,2 @@ +usr/lib/llvm-3.3/bin/cpp11-migrate +usr/bin/cpp11-migrate-3.3 diff --git a/debian/cpp11-migrate-3.3.manpages b/debian/cpp11-migrate-3.3.manpages new file mode 100644 index 00000000..5592fa2c --- /dev/null +++ b/debian/cpp11-migrate-3.3.manpages @@ -0,0 +1 @@ +man/cpp11-migrate-3.3.1 diff --git a/debian/man/cpp11-migrate-3.3.1 b/debian/man/cpp11-migrate-3.3.1 new file mode 100644 index 00000000..cb94e14f --- /dev/null +++ b/debian/man/cpp11-migrate-3.3.1 @@ -0,0 +1,256 @@ +.\" DO NOT MODIFY THIS FILE! It was generated by help2man 1.41.2. +.TH LLVM "1" "June 2013" "LLVM (http://llvm.org/):" "User Commands" +.SH NAME +LLVM \- manual page for LLVM (http://llvm.org/): +.SH DESCRIPTION +USAGE: cpp11\-migrate [options] [... ] +.SS "OPTIONS:" +.HP +\fB\-add\-override\fR \- Make use of override specifier where possible +.HP +\fB\-asm\-verbose\fR \- Add comments to directives. +.HP +\fB\-bounds\-checking\-single\-trap\fR \- Use one trap block per function +.HP +\fB\-cppfname=\fR \- Specify the name of the generated function +.HP +\fB\-cppfor=\fR \- Specify the name of the thing to generate +.HP +\fB\-cppgen\fR \- Choose what kind of output to generate +.TP +=program +\- Generate a complete program +.TP +=module +\- Generate a module definition +.TP +=contents +\- Generate contents of a module +.TP +=function +\- Generate a function definition +.TP +=functions +\- Generate all function definitions +.TP +=inline +\- Generate an inline function +.TP +=variable +\- Generate a variable definition +.TP +=type +\- Generate a type definition +.HP +\fB\-disable\-spill\-fusing\fR \- Disable fusing of spill code into instructions +.IP +Choose driver interface: +.HP +\fB\-drvnvcl\fR \- Nvidia OpenCL driver +.HP +\fB\-drvcuda\fR \- Nvidia CUDA driver +.HP +\fB\-drvtest\fR \- Plain Test +.HP +\fB\-enable\-correct\-eh\-support\fR \- Make the \fB\-lowerinvoke\fR pass insert expensive, but correct, EH code +.HP +\fB\-enable\-load\-pre\fR \- +.HP +\fB\-enable\-objc\-arc\-opts\fR \- enable/disable all ARC Optimizations +.HP +\fB\-enable\-tbaa\fR \- +.HP +\fB\-fatal\-assembler\-warnings\fR \- Consider warnings as error +.HP +\fB\-fdata\-sections\fR \- Emit data into separate sections +.HP +\fB\-ffunction\-sections\fR \- Emit functions into separate sections +.HP +\fB\-final\-syntax\-check\fR \- Check for correct syntax after applying transformations +.HP +\fB\-help\fR \- Display available options (\fB\-help\-hidden\fR for more) +.HP +\fB\-internalize\-public\-api\-file=\fR \- A file containing list of symbol names to preserve +.HP +\fB\-internalize\-public\-api\-list=\fR \- A list of symbol names to preserve +.HP +\fB\-join\-liveintervals\fR \- Coalesce copies (default=true) +.HP +\fB\-limit\-float\-precision=\fR \- Generate low\-precision inline sequences for some float libcalls +.HP +\fB\-loop\-convert\fR \- Make use of range\-based for loops where possible +.HP +\fB\-mc\-x86\-disable\-arith\-relaxation\fR \- Disable relaxation of arithmetic instruction for X86 +.HP +\fB\-mips16\-hard\-float\fR \- MIPS: mips16 hard float enable. +.HP +\fB\-msp430\-hwmult\-mode\fR \- Hardware multiplier use mode +.TP +=no +\- Do not use hardware multiplier +.TP +=interrupts +\- Assume hardware multiplier can be used inside interrupts +.TP +=use +\- Assume hardware multiplier cannot be used inside interrupts +.HP +\fB\-nvptx\-emit\-line\-numbers\fR \- NVPTX Specific: Emit Line numbers even without \fB\-G\fR +.HP +\fB\-nvptx\-emit\-src\fR \- NVPTX Specific: Emit source line in ptx file +.TP +\fB\-nvptx\-fma\-level=\fR \- NVPTX Specific: FMA contraction (0: don't do it 1: do it +2: do it aggressively +.HP +\fB\-nvptx\-mad\-enable\fR \- NVPTX Specific: Enable generating FMAD instructions +.HP +\fB\-nvptx\-prec\-divf32=\fR \- NVPTX Specifies: 0 use div.approx, 1 use div.full, 2 use IEEE Compliant F32 div.rnd if avaiable. +.HP +\fB\-nvptx\-sched4reg\fR \- NVPTX Specific: schedule for register pressue +.HP +\fB\-nvvm\-reflect\-enable\fR \- NVVM reflection, enabled by default +.HP +\fB\-nvvm\-reflect\-list=\fR> \- A list of string=num assignments +.HP +\fB\-p=\fR \- Build path +.HP +\fB\-pre\-RA\-sched\fR \- Instruction schedulers available (before register allocation): +.TP +=vliw\-td +\- VLIW scheduler +.TP +=list\-ilp +\- Bottom\-up register pressure aware list scheduling which tries to balance ILP and register pressure +.TP +=list\-hybrid +\- Bottom\-up register pressure aware list scheduling which tries to balance latency and register pressure +.TP +=source +\- Similar to list\-burr but schedules in source order when possible +.TP +=list\-burr +\- Bottom\-up register reduction list scheduling +.TP +=linearize +\- Linearize DAG, no scheduling +.TP +=fast +\- Fast suboptimal list scheduling +.TP +=default +\- Best scheduler for the target +.HP +\fB\-print\-after\-all\fR \- Print IR after each pass +.HP +\fB\-print\-before\-all\fR \- Print IR before each pass +.HP +\fB\-print\-machineinstrs=\fR \- Print machine instrs +.HP +\fB\-profile\-estimator\-loop\-weight=\fR \- Number of loop executions used for profile\-estimator +.HP +\fB\-profile\-file=\fR \- Profile file loaded by \fB\-profile\-metadata\-loader\fR +.HP +\fB\-profile\-info\-file=\fR \- Profile file loaded by \fB\-profile\-loader\fR +.HP +\fB\-profile\-verifier\-noassert\fR \- Disable assertions +.HP +\fB\-regalloc\fR \- Register allocator to use +.TP +=default +\- pick register allocator based on \fB\-O\fR option +.TP +=basic +\- basic register allocator +.TP +=fast +\- fast register allocator +.TP +=greedy +\- greedy register allocator +.TP +=pbqp +\- PBQP register allocator +.HP +\fB\-risk\fR \- Select a maximum risk level: +.TP +=safe +\- Only safe transformations +.TP +=reasonable +\- Enable transformations that might change semantics (default) +.TP +=risky +\- Enable transformations that are likely to change semantics +.HP +\fB\-shrink\-wrap\fR \- Shrink wrap callee\-saved register spills/restores +.HP +\fB\-spiller\fR \- Spiller to use: (default: standard) +.TP +=trivial +\- trivial spiller +.TP +=inline +\- inline spiller +.HP +\fB\-stats\fR \- Enable statistics output from program (available with Asserts) +.HP +\fB\-struct\-path\-tbaa\fR \- +.HP +\fB\-summary\fR \- Print transform summary +.HP +\fB\-time\-passes\fR \- Time each pass, printing elapsed time for each on exit +.HP +\fB\-use\-auto\fR \- Use of 'auto' type specifier +.HP +\fB\-use\-nullptr\fR \- Make use of nullptr keyword where possible +.HP +\fB\-user\-null\-macros=\fR \- Comma\-separated list of user\-defined macro names that behave like NULL +.HP +\fB\-vectorize\-loops\fR \- Run the Loop vectorization passes +.HP +\fB\-vectorize\-slp\fR \- Run the SLP vectorization passes +.HP +\fB\-vectorize\-slp\-aggressive\fR \- Run the BB vectorization passes +.HP +\fB\-verify\-dom\-info\fR \- Verify dominator info (time consuming) +.HP +\fB\-verify\-loop\-info\fR \- Verify loop info (time consuming) +.HP +\fB\-verify\-regalloc\fR \- Verify during register allocation +.HP +\fB\-verify\-region\-info\fR \- Verify region info (time consuming) +.HP +\fB\-verify\-scev\fR \- Verify ScalarEvolution's backedge taken counts (slow) +.HP +\fB\-version\fR \- Display the version of this program +.HP +\fB\-x86\-asm\-syntax\fR \- Choose style of code to emit from X86 backend: +.TP +=att +\- Emit AT&T\-style assembly +.TP +=intel +\- Emit Intel\-style assembly +.HP +\fB\-x86\-early\-ifcvt\fR \- Enable early if\-conversion on X86 +.HP +\fB\-x86\-use\-vzeroupper\fR \- Minimize AVX to SSE transition penalty +.IP +LLVM version 3.3 +.IP +Optimized build. +Built May 7 2013 (21:07:59). +Default target: x86_64\-pc\-linux\-gnu +Host CPU: corei7\-avx +.SH "SEE ALSO" +The full documentation for +.B LLVM +is maintained as a Texinfo manual. If the +.B info +and +.B LLVM +programs are properly installed at your site, the command +.IP +.B info LLVM +.PP +should give you access to the complete manual.