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Add upstream patch to fix a texture failure with mesa
* Cherry-pick upstream commit to fix a libgl1-mesa-dri texture failure.
(Closes: #989545)
This commit is contained in:
Gianfranco Costamagna
parent
7968be8f04
commit
07446f3aed
197
debian/patches/mesa-texture-failure.patch
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197
debian/patches/mesa-texture-failure.patch
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Description: This is a cherry-pick of upstream commits bf41c4d29e44 and c5a1eb9b0a76
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Bug-Debian: https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=989545
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Index: llvm-toolchain-11-11.0.1/llvm/include/llvm/CodeGen/MachineOperand.h
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===================================================================
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--- llvm-toolchain-11-11.0.1.orig/llvm/include/llvm/CodeGen/MachineOperand.h
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+++ llvm-toolchain-11-11.0.1/llvm/include/llvm/CodeGen/MachineOperand.h
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@@ -728,12 +728,12 @@
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/// ChangeToImmediate - Replace this operand with a new immediate operand of
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/// the specified value. If an operand is known to be an immediate already,
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/// the setImm method should be used.
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- void ChangeToImmediate(int64_t ImmVal);
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+ void ChangeToImmediate(int64_t ImmVal, unsigned TargetFlags = 0);
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/// ChangeToFPImmediate - Replace this operand with a new FP immediate operand
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/// of the specified value. If an operand is known to be an FP immediate
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/// already, the setFPImm method should be used.
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- void ChangeToFPImmediate(const ConstantFP *FPImm);
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+ void ChangeToFPImmediate(const ConstantFP *FPImm, unsigned TargetFlags = 0);
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/// ChangeToES - Replace this operand with a new external symbol operand.
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void ChangeToES(const char *SymName, unsigned TargetFlags = 0);
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@@ -743,10 +743,10 @@
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unsigned TargetFlags = 0);
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/// ChangeToMCSymbol - Replace this operand with a new MC symbol operand.
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- void ChangeToMCSymbol(MCSymbol *Sym);
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+ void ChangeToMCSymbol(MCSymbol *Sym, unsigned TargetFlags = 0);
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/// Replace this operand with a frame index.
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- void ChangeToFrameIndex(int Idx);
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+ void ChangeToFrameIndex(int Idx, unsigned TargetFlags = 0);
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/// Replace this operand with a target index.
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void ChangeToTargetIndex(unsigned Idx, int64_t Offset,
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Index: llvm-toolchain-11-11.0.1/llvm/lib/CodeGen/MachineOperand.cpp
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===================================================================
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--- llvm-toolchain-11-11.0.1.orig/llvm/lib/CodeGen/MachineOperand.cpp
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+++ llvm-toolchain-11-11.0.1/llvm/lib/CodeGen/MachineOperand.cpp
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@@ -153,22 +153,25 @@
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/// ChangeToImmediate - Replace this operand with a new immediate operand of
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/// the specified value. If an operand is known to be an immediate already,
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/// the setImm method should be used.
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-void MachineOperand::ChangeToImmediate(int64_t ImmVal) {
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+void MachineOperand::ChangeToImmediate(int64_t ImmVal, unsigned TargetFlags) {
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assert((!isReg() || !isTied()) && "Cannot change a tied operand into an imm");
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removeRegFromUses();
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OpKind = MO_Immediate;
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Contents.ImmVal = ImmVal;
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+ setTargetFlags(TargetFlags);
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}
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-void MachineOperand::ChangeToFPImmediate(const ConstantFP *FPImm) {
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+void MachineOperand::ChangeToFPImmediate(const ConstantFP *FPImm,
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+ unsigned TargetFlags) {
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assert((!isReg() || !isTied()) && "Cannot change a tied operand into an imm");
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removeRegFromUses();
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OpKind = MO_FPImmediate;
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Contents.CFP = FPImm;
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+ setTargetFlags(TargetFlags);
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}
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void MachineOperand::ChangeToES(const char *SymName,
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@@ -197,7 +200,7 @@
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setTargetFlags(TargetFlags);
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}
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-void MachineOperand::ChangeToMCSymbol(MCSymbol *Sym) {
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+void MachineOperand::ChangeToMCSymbol(MCSymbol *Sym, unsigned TargetFlags) {
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assert((!isReg() || !isTied()) &&
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"Cannot change a tied operand into an MCSymbol");
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@@ -205,9 +208,10 @@
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OpKind = MO_MCSymbol;
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Contents.Sym = Sym;
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+ setTargetFlags(TargetFlags);
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}
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-void MachineOperand::ChangeToFrameIndex(int Idx) {
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+void MachineOperand::ChangeToFrameIndex(int Idx, unsigned TargetFlags) {
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assert((!isReg() || !isTied()) &&
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"Cannot change a tied operand into a FrameIndex");
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@@ -215,6 +219,7 @@
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OpKind = MO_FrameIndex;
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setIndex(Idx);
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+ setTargetFlags(TargetFlags);
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}
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void MachineOperand::ChangeToTargetIndex(unsigned Idx, int64_t Offset,
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Index: llvm-toolchain-11-11.0.1/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
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===================================================================
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--- llvm-toolchain-11-11.0.1.orig/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
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+++ llvm-toolchain-11-11.0.1/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
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@@ -282,9 +282,6 @@
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assert(!Fold.needsShrink() && "not handled");
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if (Fold.isImm()) {
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- // FIXME: ChangeToImmediate should probably clear the subreg flags. It's
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- // reinterpreted as TargetFlags.
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- Old.setSubReg(0);
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Old.ChangeToImmediate(Fold.ImmToFold);
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return true;
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}
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@@ -819,8 +816,6 @@
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UseMI->setDesc(TII->get(AMDGPU::S_MOV_B32));
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- // FIXME: ChangeToImmediate should clear subreg
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- UseMI->getOperand(1).setSubReg(0);
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if (OpToFold.isImm())
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UseMI->getOperand(1).ChangeToImmediate(OpToFold.getImm());
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else
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Index: llvm-toolchain-11-11.0.1/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
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===================================================================
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--- llvm-toolchain-11-11.0.1.orig/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
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+++ llvm-toolchain-11-11.0.1/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
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@@ -2588,7 +2588,6 @@
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UseMI.setDesc(get(NewOpc));
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UseMI.getOperand(1).ChangeToImmediate(Imm.getSExtValue());
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- UseMI.getOperand(1).setTargetFlags(0);
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UseMI.addImplicitDefUseOperands(*UseMI.getParent()->getParent());
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return true;
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}
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Index: llvm-toolchain-11-11.0.1/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
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===================================================================
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--- llvm-toolchain-11-11.0.1.orig/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
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+++ llvm-toolchain-11-11.0.1/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
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@@ -84,21 +84,19 @@
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MachineOperand &MovSrc = Def->getOperand(1);
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bool ConstantFolded = false;
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- if (MovSrc.isImm() && (isInt<32>(MovSrc.getImm()) ||
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- isUInt<32>(MovSrc.getImm()))) {
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- // It's possible to have only one component of a super-reg defined by
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- // a single mov, so we need to clear any subregister flag.
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- Src0.setSubReg(0);
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- Src0.ChangeToImmediate(MovSrc.getImm());
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- ConstantFolded = true;
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- } else if (MovSrc.isFI()) {
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- Src0.setSubReg(0);
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- Src0.ChangeToFrameIndex(MovSrc.getIndex());
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- ConstantFolded = true;
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- } else if (MovSrc.isGlobal()) {
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- Src0.ChangeToGA(MovSrc.getGlobal(), MovSrc.getOffset(),
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- MovSrc.getTargetFlags());
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- ConstantFolded = true;
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+ if (TII->isOperandLegal(MI, Src0Idx, &MovSrc)) {
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+ if (MovSrc.isImm() &&
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+ (isInt<32>(MovSrc.getImm()) || isUInt<32>(MovSrc.getImm()))) {
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+ Src0.ChangeToImmediate(MovSrc.getImm());
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+ ConstantFolded = true;
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+ } else if (MovSrc.isFI()) {
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+ Src0.ChangeToFrameIndex(MovSrc.getIndex());
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+ ConstantFolded = true;
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+ } else if (MovSrc.isGlobal()) {
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+ Src0.ChangeToGA(MovSrc.getGlobal(), MovSrc.getOffset(),
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+ MovSrc.getTargetFlags());
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+ ConstantFolded = true;
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+ }
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}
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if (ConstantFolded) {
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Index: llvm-toolchain-11-11.0.1/llvm/test/CodeGen/AMDGPU/shrink-instructions-illegal-fold.mir
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===================================================================
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--- /dev/null
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+++ llvm-toolchain-11-11.0.1/llvm/test/CodeGen/AMDGPU/shrink-instructions-illegal-fold.mir
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@@ -0,0 +1,23 @@
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+# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=si-shrink-instructions --verify-machineinstrs %s -o - | FileCheck %s
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+
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+# Make sure immediate folding into V_CNDMASK respects constant bus restrictions.
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+---
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+
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+name: shrink_cndmask_illegal_imm_folding
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+tracksRegLiveness: true
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+body: |
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+ bb.0:
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+ liveins: $vgpr0, $vgpr1
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+ ; CHECK-LABEL: name: shrink_cndmask_illegal_imm_folding
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+ ; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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+ ; CHECK: [[MOV:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 32768, implicit $exec
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+ ; CHECK: V_CMP_EQ_U32_e32 0, [[COPY]], implicit-def $vcc, implicit $exec
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+ ; CHECK: V_CNDMASK_B32_e32 [[MOV]], killed [[COPY]], implicit $vcc, implicit $exec
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+
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+ %0:vgpr_32 = COPY $vgpr0
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+ %1:vgpr_32 = V_MOV_B32_e32 32768, implicit $exec
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+ V_CMP_EQ_U32_e32 0, %0:vgpr_32, implicit-def $vcc, implicit $exec
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+ %2:vgpr_32 = V_CNDMASK_B32_e64 0, %1:vgpr_32, 0, killed %0:vgpr_32, $vcc, implicit $exec
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+ S_NOP 0
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+
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+...
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1
debian/patches/series
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1
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@ -145,3 +145,4 @@ revert-abi-change-clang.diff
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scan-build-py-fix-analyze-path.diff
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scan-build-py-fix-analyze-path.diff
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D91833-bpftrace-fix-code-gen.diff
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D91833-bpftrace-fix-code-gen.diff
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scan-build-py-fix-default-bin.diff
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scan-build-py-fix-default-bin.diff
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mesa-texture-failure.patch
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