From 204cffaf4ca4274046e20dea3296942a92b2e5b9 Mon Sep 17 00:00:00 2001 From: Jessica Clarke Date: Wed, 1 Apr 2020 16:25:41 +0100 Subject: [PATCH 01/12] Cherry-pick upstream patch D74453 to fix atomic compare-and-swap on riscv64 --- debian/changelog | 7 + .../patches/D74453-riscv-atomic_cmp_xchg.diff | 189 ++++++++++++++++++ debian/patches/series | 1 + 3 files changed, 197 insertions(+) create mode 100644 debian/patches/D74453-riscv-atomic_cmp_xchg.diff diff --git a/debian/changelog b/debian/changelog index 3adb6390..c16f1844 100644 --- a/debian/changelog +++ b/debian/changelog @@ -1,3 +1,10 @@ +llvm-toolchain-9 (1:9.0.1-12) UNRELEASED; urgency=medium + + * Cherry-pick upstream patch D74453 to fix atomic compare-and-swap on + riscv64. + + -- Jessica Clarke Wed, 01 Apr 2020 16:23:55 +0100 + llvm-toolchain-9 (1:9.0.1-11) unstable; urgency=medium * Allow one to build g++ 9 & 10 to fix a gcc build dependency diff --git a/debian/patches/D74453-riscv-atomic_cmp_xchg.diff b/debian/patches/D74453-riscv-atomic_cmp_xchg.diff new file mode 100644 index 00000000..32cc54c6 --- /dev/null +++ b/debian/patches/D74453-riscv-atomic_cmp_xchg.diff @@ -0,0 +1,189 @@ +From 616289ed29225c0ddfe5699c7fdf42a0fcbe0ab4 Mon Sep 17 00:00:00 2001 +From: Jessica Clarke +Date: Wed, 1 Apr 2020 15:50:47 +0100 +Subject: [PATCH] [LegalizeTypes][RISCV] Correctly sign-extend comparison for + ATOMIC_CMP_XCHG + +Summary: +Currently, the comparison argument used for ATOMIC_CMP_XCHG is legalised +with GetPromotedInteger, which leaves the upper bits of the value +undefind. Since this is used for comparing in an LR/SC loop with a +full-width comparison, we must sign extend it. We introduce a new +getExtendForAtomicCmpSwapArg to complement getExtendForAtomicOps, since +many targets have compare-and-swap instructions (or pseudos) that +correctly handle an any-extend input, and the existing function +determines the extension of the result, whereas we are concerned with +the input. + +This is related to https://reviews.llvm.org/D58829, which solved the +issue for ATOMIC_CMP_SWAP_WITH_SUCCESS, but not the simpler +ATOMIC_CMP_SWAP. + +Reviewers: asb, lenary, efriedma + +Reviewed By: asb + +Subscribers: arichardson, hiraditya, rbar, johnrusso, simoncook, sabuasal, niosHD, kito-cheng, shiva0217, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, jfb, PkmX, jocewei, psnobl, benna, Jim, s.egerton, pzheng, sameer.abuasal, apazos, luismarques, evandro, llvm-commits + +Tags: #llvm + +Differential Revision: https://reviews.llvm.org/D74453 +--- + llvm/include/llvm/CodeGen/TargetLowering.h | 12 ++++++++++++ + .../SelectionDAG/LegalizeIntegerTypes.cpp | 18 +++++++++++++++++- + llvm/lib/Target/RISCV/RISCVISelLowering.h | 4 ++++ + llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll | 10 ++++++++++ + 4 files changed, 43 insertions(+), 1 deletion(-) + +diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h +index fefa8daa60a1..99601c436651 100644 +--- a/llvm/include/llvm/CodeGen/TargetLowering.h ++++ b/llvm/include/llvm/CodeGen/TargetLowering.h +@@ -1962,6 +1962,18 @@ class TargetLoweringBase { + return ISD::ZERO_EXTEND; + } + ++ /// Returns how the platform's atomic compare and swap expects its comparison ++ /// value to be extended (ZERO_EXTEND, SIGN_EXTEND, or ANY_EXTEND). This is ++ /// separate from getExtendForAtomicOps, which is concerned with the ++ /// sign-extension of the instruction's output, whereas here we are concerned ++ /// with the sign-extension of the input. For targets with compare-and-swap ++ /// instructions (or sub-word comparisons in their LL/SC loop expansions), ++ /// the input can be ANY_EXTEND, but the output will still have a specific ++ /// extension. ++ virtual ISD::NodeType getExtendForAtomicCmpSwapArg() const { ++ return ISD::ANY_EXTEND; ++ } ++ + /// @} + + /// Returns true if we should normalize +diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp +index 0248b5121e3f..ed67f7dc8ea3 100644 +--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp ++++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp +@@ -278,8 +278,24 @@ SDValue DAGTypeLegalizer::PromoteIntRes_AtomicCmpSwap(AtomicSDNode *N, + return Res.getValue(1); + } + +- SDValue Op2 = GetPromotedInteger(N->getOperand(2)); ++ // Op2 is used for the comparison and thus must be extended according to the ++ // target's atomic operations. Op3 is merely stored and so can be left alone. ++ SDValue Op2 = N->getOperand(2); + SDValue Op3 = GetPromotedInteger(N->getOperand(3)); ++ switch (TLI.getExtendForAtomicCmpSwapArg()) { ++ case ISD::SIGN_EXTEND: ++ Op2 = SExtPromotedInteger(Op2); ++ break; ++ case ISD::ZERO_EXTEND: ++ Op2 = ZExtPromotedInteger(Op2); ++ break; ++ case ISD::ANY_EXTEND: ++ Op2 = GetPromotedInteger(Op2); ++ break; ++ default: ++ llvm_unreachable("Invalid atomic op extension"); ++ } ++ + SDVTList VTs = + DAG.getVTList(Op2.getValueType(), N->getValueType(1), MVT::Other); + SDValue Res = DAG.getAtomicCmpSwap( +diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.h b/llvm/lib/Target/RISCV/RISCVISelLowering.h +index 929169dd62d9..f76abf22e4db 100644 +--- a/llvm/lib/Target/RISCV/RISCVISelLowering.h ++++ b/llvm/lib/Target/RISCV/RISCVISelLowering.h +@@ -129,6 +129,10 @@ class RISCVTargetLowering : public TargetLowering { + return ISD::SIGN_EXTEND; + } + ++ ISD::NodeType getExtendForAtomicCmpSwapArg() const override { ++ return ISD::SIGN_EXTEND; ++ } ++ + bool shouldExpandShift(SelectionDAG &DAG, SDNode *N) const override { + if (DAG.getMachineFunction().getFunction().hasMinSize()) + return false; +diff --git a/llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll b/llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll +index 43da05ebe7c7..f2691ba1a771 100644 +--- a/llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll ++++ b/llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll +@@ -1628,6 +1628,7 @@ define void @cmpxchg_i32_monotonic_monotonic(i32* %ptr, i32 %cmp, i32 %val) noun + ; + ; RV64IA-LABEL: cmpxchg_i32_monotonic_monotonic: + ; RV64IA: # %bb.0: ++; RV64IA-NEXT: sext.w a1, a1 + ; RV64IA-NEXT: .LBB20_1: # =>This Inner Loop Header: Depth=1 + ; RV64IA-NEXT: lr.w a3, (a0) + ; RV64IA-NEXT: bne a3, a1, .LBB20_3 +@@ -1680,6 +1681,7 @@ define void @cmpxchg_i32_acquire_monotonic(i32* %ptr, i32 %cmp, i32 %val) nounwi + ; + ; RV64IA-LABEL: cmpxchg_i32_acquire_monotonic: + ; RV64IA: # %bb.0: ++; RV64IA-NEXT: sext.w a1, a1 + ; RV64IA-NEXT: .LBB21_1: # =>This Inner Loop Header: Depth=1 + ; RV64IA-NEXT: lr.w.aq a3, (a0) + ; RV64IA-NEXT: bne a3, a1, .LBB21_3 +@@ -1732,6 +1734,7 @@ define void @cmpxchg_i32_acquire_acquire(i32* %ptr, i32 %cmp, i32 %val) nounwind + ; + ; RV64IA-LABEL: cmpxchg_i32_acquire_acquire: + ; RV64IA: # %bb.0: ++; RV64IA-NEXT: sext.w a1, a1 + ; RV64IA-NEXT: .LBB22_1: # =>This Inner Loop Header: Depth=1 + ; RV64IA-NEXT: lr.w.aq a3, (a0) + ; RV64IA-NEXT: bne a3, a1, .LBB22_3 +@@ -1784,6 +1787,7 @@ define void @cmpxchg_i32_release_monotonic(i32* %ptr, i32 %cmp, i32 %val) nounwi + ; + ; RV64IA-LABEL: cmpxchg_i32_release_monotonic: + ; RV64IA: # %bb.0: ++; RV64IA-NEXT: sext.w a1, a1 + ; RV64IA-NEXT: .LBB23_1: # =>This Inner Loop Header: Depth=1 + ; RV64IA-NEXT: lr.w a3, (a0) + ; RV64IA-NEXT: bne a3, a1, .LBB23_3 +@@ -1836,6 +1840,7 @@ define void @cmpxchg_i32_release_acquire(i32* %ptr, i32 %cmp, i32 %val) nounwind + ; + ; RV64IA-LABEL: cmpxchg_i32_release_acquire: + ; RV64IA: # %bb.0: ++; RV64IA-NEXT: sext.w a1, a1 + ; RV64IA-NEXT: .LBB24_1: # =>This Inner Loop Header: Depth=1 + ; RV64IA-NEXT: lr.w a3, (a0) + ; RV64IA-NEXT: bne a3, a1, .LBB24_3 +@@ -1888,6 +1893,7 @@ define void @cmpxchg_i32_acq_rel_monotonic(i32* %ptr, i32 %cmp, i32 %val) nounwi + ; + ; RV64IA-LABEL: cmpxchg_i32_acq_rel_monotonic: + ; RV64IA: # %bb.0: ++; RV64IA-NEXT: sext.w a1, a1 + ; RV64IA-NEXT: .LBB25_1: # =>This Inner Loop Header: Depth=1 + ; RV64IA-NEXT: lr.w.aq a3, (a0) + ; RV64IA-NEXT: bne a3, a1, .LBB25_3 +@@ -1940,6 +1946,7 @@ define void @cmpxchg_i32_acq_rel_acquire(i32* %ptr, i32 %cmp, i32 %val) nounwind + ; + ; RV64IA-LABEL: cmpxchg_i32_acq_rel_acquire: + ; RV64IA: # %bb.0: ++; RV64IA-NEXT: sext.w a1, a1 + ; RV64IA-NEXT: .LBB26_1: # =>This Inner Loop Header: Depth=1 + ; RV64IA-NEXT: lr.w.aq a3, (a0) + ; RV64IA-NEXT: bne a3, a1, .LBB26_3 +@@ -1992,6 +1999,7 @@ define void @cmpxchg_i32_seq_cst_monotonic(i32* %ptr, i32 %cmp, i32 %val) nounwi + ; + ; RV64IA-LABEL: cmpxchg_i32_seq_cst_monotonic: + ; RV64IA: # %bb.0: ++; RV64IA-NEXT: sext.w a1, a1 + ; RV64IA-NEXT: .LBB27_1: # =>This Inner Loop Header: Depth=1 + ; RV64IA-NEXT: lr.w.aqrl a3, (a0) + ; RV64IA-NEXT: bne a3, a1, .LBB27_3 +@@ -2044,6 +2052,7 @@ define void @cmpxchg_i32_seq_cst_acquire(i32* %ptr, i32 %cmp, i32 %val) nounwind + ; + ; RV64IA-LABEL: cmpxchg_i32_seq_cst_acquire: + ; RV64IA: # %bb.0: ++; RV64IA-NEXT: sext.w a1, a1 + ; RV64IA-NEXT: .LBB28_1: # =>This Inner Loop Header: Depth=1 + ; RV64IA-NEXT: lr.w.aqrl a3, (a0) + ; RV64IA-NEXT: bne a3, a1, .LBB28_3 +@@ -2096,6 +2105,7 @@ define void @cmpxchg_i32_seq_cst_seq_cst(i32* %ptr, i32 %cmp, i32 %val) nounwind + ; + ; RV64IA-LABEL: cmpxchg_i32_seq_cst_seq_cst: + ; RV64IA: # %bb.0: ++; RV64IA-NEXT: sext.w a1, a1 + ; RV64IA-NEXT: .LBB29_1: # =>This Inner Loop Header: Depth=1 + ; RV64IA-NEXT: lr.w.aqrl a3, (a0) + ; RV64IA-NEXT: bne a3, a1, .LBB29_3 diff --git a/debian/patches/series b/debian/patches/series index f45e0794..b54b9426 100644 --- a/debian/patches/series +++ b/debian/patches/series @@ -130,6 +130,7 @@ clang-riscv64-multiarch.diff clang-riscv64-rv64gc.diff llvm-riscv64-fix-cffi.diff D60657-riscv-pcrel_lo.diff +D74453-riscv-atomic_cmp_xchg.diff #try-to-unbreak-thinlto.diff D67877.patch From 7e77b1ae330912475d24fe1a1f168a944e00adce Mon Sep 17 00:00:00 2001 From: Gianfranco Costamagna Date: Mon, 6 Apr 2020 15:30:23 +0200 Subject: [PATCH 02/12] Add patch to fix riscv64 builds from Ubuntu, where not all gcc packages are installed --- debian/changelog | 8 ++++ debian/patches/riscv64-multilib-empty.patch | 51 +++++++++++++++++++++ debian/patches/series | 1 + 3 files changed, 60 insertions(+) create mode 100644 debian/patches/riscv64-multilib-empty.patch diff --git a/debian/changelog b/debian/changelog index c16f1844..d7446db4 100644 --- a/debian/changelog +++ b/debian/changelog @@ -1,8 +1,16 @@ llvm-toolchain-9 (1:9.0.1-12) UNRELEASED; urgency=medium + [ Jessica Clarke ] * Cherry-pick upstream patch D74453 to fix atomic compare-and-swap on riscv64. + [ William Grant ] + * debian/patches/riscv64-multilib-empty.patch: Adjust riscv64 GCC detector + to also check for existence of crtbegin.o in the default multilib dir, + like most other ports. Fixes FTBFS on riscv64, since on Ubuntu + /usr/lib/gcc/riscv64-linux-gnu/10 exists but is empty (gcc-10-base is + installed, but libgcc-10-dev is not). + -- Jessica Clarke Wed, 01 Apr 2020 16:23:55 +0100 llvm-toolchain-9 (1:9.0.1-11) unstable; urgency=medium diff --git a/debian/patches/riscv64-multilib-empty.patch b/debian/patches/riscv64-multilib-empty.patch new file mode 100644 index 00000000..ce605569 --- /dev/null +++ b/debian/patches/riscv64-multilib-empty.patch @@ -0,0 +1,51 @@ +Index: llvm-toolchain-9-9.0.1/clang/lib/Driver/ToolChains/Gnu.cpp +=================================================================== +--- llvm-toolchain-9-9.0.1.orig/clang/lib/Driver/ToolChains/Gnu.cpp ++++ llvm-toolchain-9-9.0.1/clang/lib/Driver/ToolChains/Gnu.cpp +@@ -1502,11 +1502,12 @@ static bool findMSP430Multilibs(const Dr + return false; + } + +-static void findRISCVMultilibs(const Driver &D, ++static bool findRISCVMultilibs(const Driver &D, + const llvm::Triple &TargetTriple, StringRef Path, + const ArgList &Args, DetectedMultilibs &Result) { + + FilterNonExistent NonExistent(Path, "/crtbegin.o", D.getVFS()); ++ Multilib Default; + Multilib Ilp32 = makeMultilib("lib32/ilp32").flag("+m32").flag("+mabi=ilp32"); + Multilib Ilp32f = + makeMultilib("lib32/ilp32f").flag("+m32").flag("+mabi=ilp32f"); +@@ -1517,7 +1518,7 @@ static void findRISCVMultilibs(const Dri + Multilib Lp64d = makeMultilib("lib64/lp64d").flag("+m64").flag("+mabi=lp64d"); + MultilibSet RISCVMultilibs = + MultilibSet() +- .Either({Ilp32, Ilp32f, Ilp32d, Lp64, Lp64f, Lp64d}) ++ .Either({Default, Ilp32, Ilp32f, Ilp32d, Lp64, Lp64f, Lp64d}) + .FilterOut(NonExistent); + + Multilib::flags_list Flags; +@@ -1533,8 +1534,11 @@ static void findRISCVMultilibs(const Dri + addMultilibFlag(ABIName == "lp64f", "mabi=lp64f", Flags); + addMultilibFlag(ABIName == "lp64d", "mabi=lp64d", Flags); + +- if (RISCVMultilibs.select(Flags, Result.SelectedMultilib)) +- Result.Multilibs = RISCVMultilibs; ++ if (!RISCVMultilibs.select(Flags, Result.SelectedMultilib)) ++ return false; ++ ++ Result.Multilibs = RISCVMultilibs; ++ return true; + } + + static bool findBiarchMultilibs(const Driver &D, +@@ -2309,7 +2313,8 @@ bool Generic_GCC::GCCInstallationDetecto + if (!findMIPSMultilibs(D, TargetTriple, Path, Args, Detected)) + return false; + } else if (TargetTriple.isRISCV()) { +- findRISCVMultilibs(D, TargetTriple, Path, Args, Detected); ++ if (!findRISCVMultilibs(D, TargetTriple, Path, Args, Detected)) ++ return false; + } else if (isMSP430(TargetArch)) { + findMSP430Multilibs(D, TargetTriple, Path, Args, Detected); + } else if (TargetArch == llvm::Triple::avr) { diff --git a/debian/patches/series b/debian/patches/series index b54b9426..f2ff18c5 100644 --- a/debian/patches/series +++ b/debian/patches/series @@ -144,3 +144,4 @@ python3-shebang.patch print-lldb-path.patch no-cgi.patch 947f9692440836dcb8d88b74b69dd379d85974ce.patch +riscv64-multilib-empty.patch From dd39fde395ade7a434e3739bd513bc8b46cf30ae Mon Sep 17 00:00:00 2001 From: Gianfranco Costamagna Date: Sat, 11 Apr 2020 11:44:44 +0200 Subject: [PATCH 03/12] Upload to sid --- debian/changelog | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/debian/changelog b/debian/changelog index d7446db4..423af7d1 100644 --- a/debian/changelog +++ b/debian/changelog @@ -1,4 +1,4 @@ -llvm-toolchain-9 (1:9.0.1-12) UNRELEASED; urgency=medium +llvm-toolchain-9 (1:9.0.1-12) unstable; urgency=medium [ Jessica Clarke ] * Cherry-pick upstream patch D74453 to fix atomic compare-and-swap on From eb3c0a4e9ecad19506e5b8e8870c87db54cfea56 Mon Sep 17 00:00:00 2001 From: Aurelien Jarno Date: Mon, 1 Jun 2020 23:17:36 +0200 Subject: [PATCH 04/12] Add mips-force-nomadd4.diff to default to +nomadd4 on MIPS. --- debian/README.source | 2 +- debian/changelog | 7 +++++++ debian/patches/mips-force-nomadd4.diff | 18 ++++++++++++++++++ debian/patches/series | 1 + 4 files changed, 27 insertions(+), 1 deletion(-) create mode 100644 debian/patches/mips-force-nomadd4.diff diff --git a/debian/README.source b/debian/README.source index 21e4852a..92f42396 100644 --- a/debian/README.source +++ b/debian/README.source @@ -20,7 +20,7 @@ and symlinks are managed by the other package llvm-defaults * For armv7-a, NEON extensions are disabled. -* For mips, FPXX is enabled. +* For mips, FPXX is enabled, MADD4 instructions are disabled. = Libraries = diff --git a/debian/changelog b/debian/changelog index 423af7d1..41e4a34e 100644 --- a/debian/changelog +++ b/debian/changelog @@ -1,3 +1,10 @@ +llvm-toolchain-9 (1:9.0.1-13) UNRELEASED; urgency=medium + + [ Aurelien Jarno ] + * Add mips-force-nomadd4.diff to default to +nomadd4 on MIPS. + + -- Aurelien Jarno Mon, 01 Jun 2020 23:17:06 +0200 + llvm-toolchain-9 (1:9.0.1-12) unstable; urgency=medium [ Jessica Clarke ] diff --git a/debian/patches/mips-force-nomadd4.diff b/debian/patches/mips-force-nomadd4.diff new file mode 100644 index 00000000..70021b02 --- /dev/null +++ b/debian/patches/mips-force-nomadd4.diff @@ -0,0 +1,18 @@ +The MIPS port aims to support the Loongson 3 family of CPUs in addition +of the other MIPS CPUs. On the Loongson 3 family the MADD4 instructions +are fused, while they are not fused on the other MIPS CPUs. In order to +support both, we have to disabled those instructions. + +For that, the patch below basically corresponds to the --with-madd4=no +used on the GCC side. + +--- a/clang/lib/Basic/Targets/Mips.h ++++ b/clang/lib/Basic/Targets/Mips.h +@@ -314,6 +314,7 @@ public: + FloatABI = HardFloat; + DspRev = NoDSP; + FPMode = isFP64Default() ? FP64 : FPXX; ++ DisableMadd4 = true; + + for (const auto &Feature : Features) { + if (Feature == "+single-float") diff --git a/debian/patches/series b/debian/patches/series index f2ff18c5..5dab4a29 100644 --- a/debian/patches/series +++ b/debian/patches/series @@ -83,6 +83,7 @@ libcxx/libcxx-silent-failure-arm64.diff # Change default optims mips-fpxx-enable.diff +mips-force-nomadd4.diff 26-set-correct-float-abi.diff clang-baseline-fix-i386.patch disable-sse2-old-x86.diff From 9e04a9e185d80c012e2d11c36f51df4b4dac93c1 Mon Sep 17 00:00:00 2001 From: Ximin Luo Date: Sat, 4 Jul 2020 14:18:30 +0100 Subject: [PATCH 05/12] Backport 373184 for a rustc soundness issue --- debian/changelog | 3 + debian/patches/373184.patch | 111 ++++++++++++++++++++++++++++++++++++ debian/patches/series | 3 + 3 files changed, 117 insertions(+) create mode 100644 debian/patches/373184.patch diff --git a/debian/changelog b/debian/changelog index 41e4a34e..a6bbba7a 100644 --- a/debian/changelog +++ b/debian/changelog @@ -3,6 +3,9 @@ llvm-toolchain-9 (1:9.0.1-13) UNRELEASED; urgency=medium [ Aurelien Jarno ] * Add mips-force-nomadd4.diff to default to +nomadd4 on MIPS. + [ Ximin Luo ] + * Add 373184.patch to fix soundness issue affecting rustc. (Closes: #959877) + -- Aurelien Jarno Mon, 01 Jun 2020 23:17:06 +0200 llvm-toolchain-9 (1:9.0.1-12) unstable; urgency=medium diff --git a/debian/patches/373184.patch b/debian/patches/373184.patch new file mode 100644 index 00000000..2041a6d4 --- /dev/null +++ b/debian/patches/373184.patch @@ -0,0 +1,111 @@ +From 7d5e7c023053660ffe494d72ce471e48ecc7f49b Mon Sep 17 00:00:00 2001 +From: Tim Northover +Date: Mon, 30 Sep 2019 07:46:52 +0000 +Subject: [PATCH] Revert "[SCEV] add no wrap flag for SCEVAddExpr." + +This reverts r366419 because the analysis performed is within the context of +the loop and it's only valid to add wrapping flags to "global" expressions if +they're always correct. + +llvm-svn: 373184 +(cherry picked from commit 58e8c793d0e43150a6452e971a32d7407a8a7401) +--- + llvm/lib/Analysis/ScalarEvolution.cpp | 2 +- + llvm/test/Analysis/ScalarEvolution/limit-depth.ll | 2 +- + llvm/test/Analysis/ScalarEvolution/nsw.ll | 2 +- + llvm/test/Analysis/ScalarEvolution/trip-count12.ll | 2 +- + llvm/test/Analysis/ScalarEvolution/trip-count9.ll | 8 ++++---- + 5 files changed, 8 insertions(+), 8 deletions(-) + +diff --git a/llvm/lib/Analysis/ScalarEvolution.cpp b/llvm/lib/Analysis/ScalarEvolution.cpp +index bc2cfd6fcc42..d81886fca9da 100644 +--- a/llvm/lib/Analysis/ScalarEvolution.cpp ++++ b/llvm/lib/Analysis/ScalarEvolution.cpp +@@ -4991,7 +4991,7 @@ const SCEV *ScalarEvolution::createSimpleAffineAddRec(PHINode *PN, + // overflow. + if (auto *BEInst = dyn_cast(BEValueV)) + if (isLoopInvariant(Accum, L) && isAddRecNeverPoison(BEInst, L)) +- (void)getAddRecExpr(getAddExpr(StartVal, Accum, Flags), Accum, L, Flags); ++ (void)getAddRecExpr(getAddExpr(StartVal, Accum), Accum, L, Flags); + + return PHISCEV; + } +diff --git a/llvm/test/Analysis/ScalarEvolution/limit-depth.ll b/llvm/test/Analysis/ScalarEvolution/limit-depth.ll +index db68a4f84c91..6fdf8c5df974 100644 +--- a/llvm/test/Analysis/ScalarEvolution/limit-depth.ll ++++ b/llvm/test/Analysis/ScalarEvolution/limit-depth.ll +@@ -46,7 +46,7 @@ define void @test_mul(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f) { + define void @test_sext(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f) { + ; CHECK-LABEL: @test_sext + ; CHECK: %se2 = sext i64 %iv2.inc to i128 +-; CHECK-NEXT: --> {(1 + (sext i64 {(sext i32 (1 + %a) to i64),+,1}<%loop> to i128)),+,1}<%loop2> ++; CHECK-NEXT: --> {(1 + (sext i64 {(sext i32 (1 + %a) to i64),+,1}<%loop> to i128)),+,1}<%loop2> + entry: + br label %loop + +diff --git a/llvm/test/Analysis/ScalarEvolution/nsw.ll b/llvm/test/Analysis/ScalarEvolution/nsw.ll +index 69427368625d..ca24f9d4a04b 100644 +--- a/llvm/test/Analysis/ScalarEvolution/nsw.ll ++++ b/llvm/test/Analysis/ScalarEvolution/nsw.ll +@@ -163,7 +163,7 @@ bb5: ; preds = %bb2 + declare void @f(i32) + + ; CHECK-LABEL: nswnowrap +-; CHECK: --> {(1 + %v),+,1}<%for.body>{{ U: [^ ]+ S: [^ ]+}}{{ *}}Exits: (2 + %v) ++; CHECK: --> {(1 + %v),+,1}<%for.body>{{ U: [^ ]+ S: [^ ]+}}{{ *}}Exits: (1 + ((1 + %v) smax %v)) + define void @nswnowrap(i32 %v, i32* %buf) { + entry: + %add = add nsw i32 %v, 1 +diff --git a/llvm/test/Analysis/ScalarEvolution/trip-count12.ll b/llvm/test/Analysis/ScalarEvolution/trip-count12.ll +index 5e7d72d5e4f3..d0086ee2e6ac 100644 +--- a/llvm/test/Analysis/ScalarEvolution/trip-count12.ll ++++ b/llvm/test/Analysis/ScalarEvolution/trip-count12.ll +@@ -1,7 +1,7 @@ + ; RUN: opt < %s -analyze -scalar-evolution | FileCheck %s + + ; CHECK: Determining loop execution counts for: @test +-; CHECK: Loop %for.body: backedge-taken count is ((-2 + %len) /u 2) ++; CHECK: Loop %for.body: backedge-taken count is ((-2 + %len) /u 2) + ; CHECK: Loop %for.body: max backedge-taken count is 1073741823 + + define zeroext i16 @test(i16* nocapture %p, i32 %len) nounwind readonly { +diff --git a/llvm/test/Analysis/ScalarEvolution/trip-count9.ll b/llvm/test/Analysis/ScalarEvolution/trip-count9.ll +index c0a1d12fa00e..9a080b34743f 100644 +--- a/llvm/test/Analysis/ScalarEvolution/trip-count9.ll ++++ b/llvm/test/Analysis/ScalarEvolution/trip-count9.ll +@@ -179,7 +179,7 @@ exit: + } + + ; CHECK: Determining loop execution counts for: @nsw_startx +-; CHECK: Loop %loop: backedge-taken count is (-1 + (-1 * %x) + ((1 + %x) smax %n)) ++; CHECK: Loop %loop: backedge-taken count is (-1 + (-1 * %x) + ((1 + %x) smax %n)) + ; CHECK: Loop %loop: max backedge-taken count is -1 + define void @nsw_startx(i4 %n, i4 %x) { + entry: +@@ -195,7 +195,7 @@ exit: + } + + ; CHECK: Determining loop execution counts for: @nsw_startx_step2 +-; CHECK: Loop %loop: backedge-taken count is ((-1 + (-1 * %x) + ((2 + %x) smax %n)) /u 2) ++; CHECK: Loop %loop: backedge-taken count is ((-1 + (-1 * %x) + ((2 + %x) smax %n)) /u 2) + ; CHECK: Loop %loop: max backedge-taken count is 7 + define void @nsw_startx_step2(i4 %n, i4 %x) { + entry: +@@ -381,7 +381,7 @@ exit: + } + + ; CHECK: Determining loop execution counts for: @even_nsw_startx +-; CHECK: Loop %loop: backedge-taken count is (-1 + (-1 * %x) + ((1 + %x) smax (2 * %n))) ++; CHECK: Loop %loop: backedge-taken count is (-1 + (-1 * %x) + ((1 + %x) smax (2 * %n))) + ; CHECK: Loop %loop: max backedge-taken count is -2 + define void @even_nsw_startx(i4 %n, i4 %x) { + entry: +@@ -398,7 +398,7 @@ exit: + } + + ; CHECK: Determining loop execution counts for: @even_nsw_startx_step2 +-; CHECK: Loop %loop: backedge-taken count is ((-1 + (-1 * %x) + ((2 + %x) smax (2 * %n))) /u 2) ++; CHECK: Loop %loop: backedge-taken count is ((-1 + (-1 * %x) + ((2 + %x) smax (2 * %n))) /u 2) + ; CHECK: Loop %loop: max backedge-taken count is 7 + define void @even_nsw_startx_step2(i4 %n, i4 %x) { + entry: diff --git a/debian/patches/series b/debian/patches/series index 5dab4a29..cd2e074a 100644 --- a/debian/patches/series +++ b/debian/patches/series @@ -146,3 +146,6 @@ print-lldb-path.patch no-cgi.patch 947f9692440836dcb8d88b74b69dd379d85974ce.patch riscv64-multilib-empty.patch + +# bug 959877 +373184.patch From daad62081e99971e1e24da16c89edbe9555f2cea Mon Sep 17 00:00:00 2001 From: Ximin Luo Date: Sat, 4 Jul 2020 14:33:40 +0100 Subject: [PATCH 06/12] Backport f8e146f3430de3a6cd904f3f3f7aa1bfaefee14c for a big-endian issue --- debian/changelog | 2 + ...46f3430de3a6cd904f3f3f7aa1bfaefee14c.patch | 192 ++++++++++++++++++ debian/patches/series | 2 + 3 files changed, 196 insertions(+) create mode 100644 debian/patches/f8e146f3430de3a6cd904f3f3f7aa1bfaefee14c.patch diff --git a/debian/changelog b/debian/changelog index a6bbba7a..4abdcc4c 100644 --- a/debian/changelog +++ b/debian/changelog @@ -5,6 +5,8 @@ llvm-toolchain-9 (1:9.0.1-13) UNRELEASED; urgency=medium [ Ximin Luo ] * Add 373184.patch to fix soundness issue affecting rustc. (Closes: #959877) + * Add f8e146f3430de3a6cd904f3f3f7aa1bfaefee14c.patch to fix big-endian + miscompilation affecting rustc. -- Aurelien Jarno Mon, 01 Jun 2020 23:17:06 +0200 diff --git a/debian/patches/f8e146f3430de3a6cd904f3f3f7aa1bfaefee14c.patch b/debian/patches/f8e146f3430de3a6cd904f3f3f7aa1bfaefee14c.patch new file mode 100644 index 00000000..fe381acf --- /dev/null +++ b/debian/patches/f8e146f3430de3a6cd904f3f3f7aa1bfaefee14c.patch @@ -0,0 +1,192 @@ +From f8e146f3430de3a6cd904f3f3f7aa1bfaefee14c Mon Sep 17 00:00:00 2001 +From: Bjorn Pettersson +Date: Thu, 28 Nov 2019 23:18:28 +0100 +Subject: [PATCH] [InstCombine] Fix big-endian miscompile of (bitcast + (zext/trunc (bitcast))) + +Summary: +optimizeVectorResize is rewriting patterns like: + %1 = bitcast vector %src to integer + %2 = trunc/zext %1 + %dst = bitcast %2 to vector + +Since bitcasting between integer an vector types gives +different integer values depending on endianness, we need +to take endianness into account. As it happens the old +implementation only produced the correct result for little +endian targets. + +Fixes: https://bugs.llvm.org/show_bug.cgi?id=44178 + +Reviewers: spatel, lattner, lebedev.ri + +Reviewed By: spatel, lebedev.ri + +Subscribers: lebedev.ri, hiraditya, uabelho, llvm-commits + +Tags: #llvm + +Differential Revision: https://reviews.llvm.org/D70844 + +(cherry picked from commit a9d6b0e5444741d08ff1df7cf71d1559e7fefc1f) +--- + .../InstCombine/InstCombineCasts.cpp | 79 +++++++++++++------ + llvm/test/Transforms/InstCombine/cast.ll | 6 +- + 2 files changed, 60 insertions(+), 25 deletions(-) + +diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp +index 2c9ba203fbf3..0af3de300e77 100644 +--- a/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp ++++ b/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp +@@ -18,6 +18,7 @@ + #include "llvm/IR/DIBuilder.h" + #include "llvm/IR/PatternMatch.h" + #include "llvm/Support/KnownBits.h" ++#include + using namespace llvm; + using namespace PatternMatch; + +@@ -1820,12 +1821,24 @@ Instruction *InstCombiner::visitPtrToInt(PtrToIntInst &CI) { + } + + /// This input value (which is known to have vector type) is being zero extended +-/// or truncated to the specified vector type. ++/// or truncated to the specified vector type. Since the zext/trunc is done ++/// using an integer type, we have a (bitcast(cast(bitcast))) pattern, ++/// endianness will impact which end of the vector that is extended or ++/// truncated. ++/// ++/// A vector is always stored with index 0 at the lowest address, which ++/// corresponds to the most significant bits for a big endian stored integer and ++/// the least significant bits for little endian. A trunc/zext of an integer ++/// impacts the big end of the integer. Thus, we need to add/remove elements at ++/// the front of the vector for big endian targets, and the back of the vector ++/// for little endian targets. ++/// + /// Try to replace it with a shuffle (and vector/vector bitcast) if possible. + /// + /// The source and destination vector types may have different element types. +-static Instruction *optimizeVectorResize(Value *InVal, VectorType *DestTy, +- InstCombiner &IC) { ++static Instruction *optimizeVectorResizeWithIntegerBitCasts(Value *InVal, ++ VectorType *DestTy, ++ InstCombiner &IC) { + // We can only do this optimization if the output is a multiple of the input + // element size, or the input is a multiple of the output element size. + // Convert the input type to have the same element type as the output. +@@ -1844,31 +1857,53 @@ static Instruction *optimizeVectorResize(Value *InVal, VectorType *DestTy, + InVal = IC.Builder.CreateBitCast(InVal, SrcTy); + } + ++ bool IsBigEndian = IC.getDataLayout().isBigEndian(); ++ unsigned SrcElts = SrcTy->getNumElements(); ++ unsigned DestElts = DestTy->getNumElements(); ++ ++ assert(SrcElts != DestElts && "Element counts should be different."); ++ + // Now that the element types match, get the shuffle mask and RHS of the + // shuffle to use, which depends on whether we're increasing or decreasing the + // size of the input. +- SmallVector ShuffleMask; ++ SmallVector ShuffleMaskStorage; ++ ArrayRef ShuffleMask; + Value *V2; + +- if (SrcTy->getNumElements() > DestTy->getNumElements()) { +- // If we're shrinking the number of elements, just shuffle in the low +- // elements from the input and use undef as the second shuffle input. +- V2 = UndefValue::get(SrcTy); +- for (unsigned i = 0, e = DestTy->getNumElements(); i != e; ++i) +- ShuffleMask.push_back(i); ++ // Produce an identify shuffle mask for the src vector. ++ ShuffleMaskStorage.resize(SrcElts); ++ std::iota(ShuffleMaskStorage.begin(), ShuffleMaskStorage.end(), 0); + ++ if (SrcElts > DestElts) { ++ // If we're shrinking the number of elements (rewriting an integer ++ // truncate), just shuffle in the elements corresponding to the least ++ // significant bits from the input and use undef as the second shuffle ++ // input. ++ V2 = UndefValue::get(SrcTy); ++ // Make sure the shuffle mask selects the "least significant bits" by ++ // keeping elements from back of the src vector for big endian, and from the ++ // front for little endian. ++ ShuffleMask = ShuffleMaskStorage; ++ if (IsBigEndian) ++ ShuffleMask = ShuffleMask.take_back(DestElts); ++ else ++ ShuffleMask = ShuffleMask.take_front(DestElts); + } else { +- // If we're increasing the number of elements, shuffle in all of the +- // elements from InVal and fill the rest of the result elements with zeros +- // from a constant zero. ++ // If we're increasing the number of elements (rewriting an integer zext), ++ // shuffle in all of the elements from InVal. Fill the rest of the result ++ // elements with zeros from a constant zero. + V2 = Constant::getNullValue(SrcTy); +- unsigned SrcElts = SrcTy->getNumElements(); +- for (unsigned i = 0, e = SrcElts; i != e; ++i) +- ShuffleMask.push_back(i); +- +- // The excess elements reference the first element of the zero input. +- for (unsigned i = 0, e = DestTy->getNumElements()-SrcElts; i != e; ++i) +- ShuffleMask.push_back(SrcElts); ++ // Use first elt from V2 when indicating zero in the shuffle mask. ++ uint32_t NullElt = SrcElts; ++ // Extend with null values in the "most significant bits" by adding elements ++ // in front of the src vector for big endian, and at the back for little ++ // endian. ++ unsigned DeltaElts = DestElts - SrcElts; ++ if (IsBigEndian) ++ ShuffleMaskStorage.insert(ShuffleMaskStorage.begin(), DeltaElts, NullElt); ++ else ++ ShuffleMaskStorage.append(DeltaElts, NullElt); ++ ShuffleMask = ShuffleMaskStorage; + } + + return new ShuffleVectorInst(InVal, V2, +@@ -2359,8 +2394,8 @@ Instruction *InstCombiner::visitBitCast(BitCastInst &CI) { + CastInst *SrcCast = cast(Src); + if (BitCastInst *BCIn = dyn_cast(SrcCast->getOperand(0))) + if (isa(BCIn->getOperand(0)->getType())) +- if (Instruction *I = optimizeVectorResize(BCIn->getOperand(0), +- cast(DestTy), *this)) ++ if (Instruction *I = optimizeVectorResizeWithIntegerBitCasts( ++ BCIn->getOperand(0), cast(DestTy), *this)) + return I; + } + +diff --git a/llvm/test/Transforms/InstCombine/cast.ll b/llvm/test/Transforms/InstCombine/cast.ll +index b6d1eda0601d..3ce8de033422 100644 +--- a/llvm/test/Transforms/InstCombine/cast.ll ++++ b/llvm/test/Transforms/InstCombine/cast.ll +@@ -824,7 +824,7 @@ define i64 @test59(i8 %A, i8 %B) { + + define <3 x i32> @test60(<4 x i32> %call4) { + ; CHECK-LABEL: @test60( +-; CHECK-NEXT: [[P10:%.*]] = shufflevector <4 x i32> [[CALL4:%.*]], <4 x i32> undef, <3 x i32> ++; CHECK-NEXT: [[P10:%.*]] = shufflevector <4 x i32> [[CALL4:%.*]], <4 x i32> undef, <3 x i32> + ; CHECK-NEXT: ret <3 x i32> [[P10]] + ; + %p11 = bitcast <4 x i32> %call4 to i128 +@@ -836,7 +836,7 @@ define <3 x i32> @test60(<4 x i32> %call4) { + + define <4 x i32> @test61(<3 x i32> %call4) { + ; CHECK-LABEL: @test61( +-; CHECK-NEXT: [[P10:%.*]] = shufflevector <3 x i32> [[CALL4:%.*]], <3 x i32> , <4 x i32> ++; CHECK-NEXT: [[P10:%.*]] = shufflevector <3 x i32> [[CALL4:%.*]], <3 x i32> , <4 x i32> + ; CHECK-NEXT: ret <4 x i32> [[P10]] + ; + %p11 = bitcast <3 x i32> %call4 to i96 +@@ -848,7 +848,7 @@ define <4 x i32> @test61(<3 x i32> %call4) { + define <4 x i32> @test62(<3 x float> %call4) { + ; CHECK-LABEL: @test62( + ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <3 x float> [[CALL4:%.*]] to <3 x i32> +-; CHECK-NEXT: [[P10:%.*]] = shufflevector <3 x i32> [[TMP1]], <3 x i32> , <4 x i32> ++; CHECK-NEXT: [[P10:%.*]] = shufflevector <3 x i32> [[TMP1]], <3 x i32> , <4 x i32> + ; CHECK-NEXT: ret <4 x i32> [[P10]] + ; + %p11 = bitcast <3 x float> %call4 to i96 +-- +2.26.2 + diff --git a/debian/patches/series b/debian/patches/series index cd2e074a..e98390e6 100644 --- a/debian/patches/series +++ b/debian/patches/series @@ -149,3 +149,5 @@ riscv64-multilib-empty.patch # bug 959877 373184.patch + +f8e146f3430de3a6cd904f3f3f7aa1bfaefee14c.patch From 53f7e886ce3288950c7e0875878543fd114947a5 Mon Sep 17 00:00:00 2001 From: Gianfranco Costamagna Date: Sun, 23 Aug 2020 13:36:53 +0200 Subject: [PATCH 07/12] Upload to unstable, with patches for ppc64el build failures. --- debian/changelog | 12 ++++++-- ...c30c54d0af5bffbff3bcfd721668d086ff10.patch | 30 +++++++++++++++++++ debian/patches/series | 1 + 3 files changed, 41 insertions(+), 2 deletions(-) create mode 100644 debian/patches/3185c30c54d0af5bffbff3bcfd721668d086ff10.patch diff --git a/debian/changelog b/debian/changelog index 4abdcc4c..544170f9 100644 --- a/debian/changelog +++ b/debian/changelog @@ -1,4 +1,12 @@ -llvm-toolchain-9 (1:9.0.1-13) UNRELEASED; urgency=medium +llvm-toolchain-9 (1:9.0.1-14) unstable; urgency=medium + + * debian/patches/b288d90b39f4b905c02092a9bfcfd6d78f99b191.patch: + * debian/patches/3185c30c54d0af5bffbff3bcfd721668d086ff10.patch: + - cherry-pick upstream fixes for ppc64el build failure (Closes: #968174) + + -- Gianfranco Costamagna Sat, 15 Aug 2020 21:53:41 +0200 + +llvm-toolchain-9 (1:9.0.1-13) unstable; urgency=medium [ Aurelien Jarno ] * Add mips-force-nomadd4.diff to default to +nomadd4 on MIPS. @@ -8,7 +16,7 @@ llvm-toolchain-9 (1:9.0.1-13) UNRELEASED; urgency=medium * Add f8e146f3430de3a6cd904f3f3f7aa1bfaefee14c.patch to fix big-endian miscompilation affecting rustc. - -- Aurelien Jarno Mon, 01 Jun 2020 23:17:06 +0200 + -- Sylvestre Ledru Tue, 07 Jul 2020 18:18:00 +0200 llvm-toolchain-9 (1:9.0.1-12) unstable; urgency=medium diff --git a/debian/patches/3185c30c54d0af5bffbff3bcfd721668d086ff10.patch b/debian/patches/3185c30c54d0af5bffbff3bcfd721668d086ff10.patch new file mode 100644 index 00000000..eeb9599c --- /dev/null +++ b/debian/patches/3185c30c54d0af5bffbff3bcfd721668d086ff10.patch @@ -0,0 +1,30 @@ +From 3185c30c54d0af5bffbff3bcfd721668d086ff10 Mon Sep 17 00:00:00 2001 +From: serge-sans-paille +Date: Thu, 6 Feb 2020 15:58:29 +0100 +Subject: [PATCH] Prefer __vector over vector keyword for altivec + +`vector' uses the keyword-and-predefine mode from gcc, while __vector is +reliably supported. + +As a side effect, it also makes the code consistent in its usage of __vector. + +Differential Revision: https://reviews.llvm.org/D74129 +--- + clang/lib/Lex/Lexer.cpp | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/clang/lib/Lex/Lexer.cpp b/clang/lib/Lex/Lexer.cpp +index 9034726560dc..a51745697b11 100644 +--- a/clang/lib/Lex/Lexer.cpp ++++ b/clang/lib/Lex/Lexer.cpp +@@ -2541,8 +2541,8 @@ bool Lexer::SkipBlockComment(Token &Result, const char *CurPtr, + '/', '/', '/', '/', '/', '/', '/', '/', + '/', '/', '/', '/', '/', '/', '/', '/' + }; +- while (CurPtr+16 <= BufferEnd && +- !vec_any_eq(*(const vector unsigned char*)CurPtr, Slashes)) ++ while (CurPtr + 16 <= BufferEnd && ++ !vec_any_eq(*(const __vector unsigned char *)CurPtr, Slashes)) + CurPtr += 16; + #else + // Scan for '/' quickly. Many block comments are very large. diff --git a/debian/patches/series b/debian/patches/series index e98390e6..3833ee7a 100644 --- a/debian/patches/series +++ b/debian/patches/series @@ -151,3 +151,4 @@ riscv64-multilib-empty.patch 373184.patch f8e146f3430de3a6cd904f3f3f7aa1bfaefee14c.patch +3185c30c54d0af5bffbff3bcfd721668d086ff10.patch From 696e5c774e4cce1d7a9cfdccba895dd6ef2cad2c Mon Sep 17 00:00:00 2001 From: Gianfranco Costamagna Date: Sun, 23 Aug 2020 13:38:29 +0200 Subject: [PATCH 08/12] Also close bug: #964988 --- debian/changelog | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/debian/changelog b/debian/changelog index 544170f9..2a5c5e5e 100644 --- a/debian/changelog +++ b/debian/changelog @@ -3,13 +3,15 @@ llvm-toolchain-9 (1:9.0.1-14) unstable; urgency=medium * debian/patches/b288d90b39f4b905c02092a9bfcfd6d78f99b191.patch: * debian/patches/3185c30c54d0af5bffbff3bcfd721668d086ff10.patch: - cherry-pick upstream fixes for ppc64el build failure (Closes: #968174) + * Previous version closed bug: 964988 (Closes: #964988) -- Gianfranco Costamagna Sat, 15 Aug 2020 21:53:41 +0200 llvm-toolchain-9 (1:9.0.1-13) unstable; urgency=medium [ Aurelien Jarno ] - * Add mips-force-nomadd4.diff to default to +nomadd4 on MIPS. + * Add mips-force-nomadd4.diff to default to +nomadd4 on MIPS. (Closes: + #964988) [ Ximin Luo ] * Add 373184.patch to fix soundness issue affecting rustc. (Closes: #959877) From f0b4b8baad4e099693a9808fe219356c30909dd9 Mon Sep 17 00:00:00 2001 From: Vagrant Cascadian Date: Fri, 23 Oct 2020 00:28:08 +0000 Subject: [PATCH 09/12] Ensure fixfilepath feature is disabled. The fixfilepath feature sets a -ffile-prefix-map flag, which is only supported in clang-10. --- debian/changelog | 9 +++++++++ debian/rules | 4 ++++ 2 files changed, 13 insertions(+) diff --git a/debian/changelog b/debian/changelog index 2a5c5e5e..4d2eafec 100644 --- a/debian/changelog +++ b/debian/changelog @@ -1,3 +1,12 @@ +llvm-toolchain-9 (1:9.0.1-15) unstable; urgency=medium + + * Ensure fixfilepath feature is disabled. The fixfilepath + feature sets a -ffile-prefix-map flag, which is only + supported in clang-10. (Closes: #972751). + Thanks to Vagrant Cascadian for the patch + + -- Sylvestre Ledru Fri, 23 Oct 2020 09:14:16 +0200 + llvm-toolchain-9 (1:9.0.1-14) unstable; urgency=medium * debian/patches/b288d90b39f4b905c02092a9bfcfd6d78f99b191.patch: diff --git a/debian/rules b/debian/rules index b5be01a8..9fc9e675 100755 --- a/debian/rules +++ b/debian/rules @@ -58,6 +58,10 @@ ifneq (,$(filter $(DEB_HOST_ARCH),armel riscv64)) LDFLAGS_EXTRA += -latomic endif +# Ensure fixfilepath feature is disabled. The fixfilepath feature +# sets a -ffile-prefix-map flag, which is only supported in clang-10. +export DEB_BUILD_MAINT_OPTIONS=reproducible=-fixfilepath + # Cxx flags for building libcxx and libcxxabi LIBCXXFLAGS := $(shell dpkg-buildflags --get CXXFLAGS) $(shell dpkg-buildflags --get CPPFLAGS) From e461697a7a604415d5e1afe9a944aae098575dfc Mon Sep 17 00:00:00 2001 From: Sylvestre Ledru Date: Sat, 31 Oct 2020 14:07:40 +0100 Subject: [PATCH 10/12] Don't use gold on ppc64el. It fails to build in that case (Closes: #972317) --- debian/changelog | 2 ++ debian/rules | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/debian/changelog b/debian/changelog index 4d2eafec..54874252 100644 --- a/debian/changelog +++ b/debian/changelog @@ -4,6 +4,8 @@ llvm-toolchain-9 (1:9.0.1-15) unstable; urgency=medium feature sets a -ffile-prefix-map flag, which is only supported in clang-10. (Closes: #972751). Thanks to Vagrant Cascadian for the patch + * Don't use gold on ppc64el. It fails to build in that case + (Closes: #972317) -- Sylvestre Ledru Fri, 23 Oct 2020 09:14:16 +0200 diff --git a/debian/rules b/debian/rules index 9fc9e675..ab8eb412 100755 --- a/debian/rules +++ b/debian/rules @@ -135,7 +135,7 @@ endif # CMAKE_EXTRA += -DLLVM_ENABLE_LLD=ON # endif -BINUTILS_GOLD_ARCHS := amd64 arm64 armhf i386 ppc64 ppc64el x32 s390x hurd-i386 kfreebsd-amd64 kfreebsd-i386 +BINUTILS_GOLD_ARCHS := amd64 arm64 armhf i386 ppc64 x32 s390x hurd-i386 kfreebsd-amd64 kfreebsd-i386 ifeq ($(shell dpkg --compare-versions $(shell dpkg-query -W -f '$${Version}' binutils) ge 2.23.1-1~exp3 ; echo $$?),0) ifneq (,$(filter $(DEB_HOST_ARCH),$(BINUTILS_GOLD_ARCHS))) # -fused-ld=gold enables the gold linker (but is not supported by all archs / distro) From cb42a277c71b35b515b7596d488a4919cde52b3a Mon Sep 17 00:00:00 2001 From: Sylvestre Ledru Date: Fri, 23 Oct 2020 09:32:39 +0200 Subject: [PATCH 11/12] Replace use of deprecated $ADTTMP with $AUTOPKGTEST_TMP. Changes-By: lintian-brush Fixes: lintian: uses-deprecated-adttmp See-also: https://lintian.debian.org/tags/uses-deprecated-adttmp.html --- debian/changelog | 6 ++++++ debian/tests/cmake-test | 8 ++++---- 2 files changed, 10 insertions(+), 4 deletions(-) diff --git a/debian/changelog b/debian/changelog index 54874252..462f474e 100644 --- a/debian/changelog +++ b/debian/changelog @@ -1,3 +1,9 @@ +llvm-toolchain-9 (1:9.0.1-16) UNRELEASED; urgency=low + + * Replace use of deprecated $ADTTMP with $AUTOPKGTEST_TMP. + + -- Sylvestre Ledru Fri, 23 Oct 2020 09:32:39 -0000 + llvm-toolchain-9 (1:9.0.1-15) unstable; urgency=medium * Ensure fixfilepath feature is disabled. The fixfilepath diff --git a/debian/tests/cmake-test b/debian/tests/cmake-test index c9f26699..4e774f1f 100755 --- a/debian/tests/cmake-test +++ b/debian/tests/cmake-test @@ -3,18 +3,18 @@ set -e # this is taken from libjsoncpp package -# Presence of $ADTTMP implies that someone will handle cleanup for us, so we +# Presence of $AUTOPKGTEST_TMP implies that someone will handle cleanup for us, so we # can avoid duplicating the effort (signal handling, etc.) here. -if [ -z "$ADTTMP" ] +if [ -z "$AUTOPKGTEST_TMP" ] then - echo "Required envvar ADTTMP \"$ADTTMP\" is not set" >&2 + echo "Required envvar AUTOPKGTEST_TMP \"$AUTOPKGTEST_TMP\" is not set" >&2 exit 1 fi # the idea was taken from spirv-llvm-translator package -cd "$ADTTMP" +cd "$AUTOPKGTEST_TMP" cat < CMakeLists.txt cmake_minimum_required(VERSION 2.6.2) project(cmake-test) From 9e343e65aad1b5235a3f989f2602a14d3896afb8 Mon Sep 17 00:00:00 2001 From: Sylvestre Ledru Date: Sat, 31 Oct 2020 14:09:24 +0100 Subject: [PATCH 12/12] fix changelog --- debian/changelog | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/debian/changelog b/debian/changelog index 462f474e..bf000b9b 100644 --- a/debian/changelog +++ b/debian/changelog @@ -1,11 +1,6 @@ -llvm-toolchain-9 (1:9.0.1-16) UNRELEASED; urgency=low +llvm-toolchain-9 (1:9.0.1-15) unstable; urgency=low * Replace use of deprecated $ADTTMP with $AUTOPKGTEST_TMP. - - -- Sylvestre Ledru Fri, 23 Oct 2020 09:32:39 -0000 - -llvm-toolchain-9 (1:9.0.1-15) unstable; urgency=medium - * Ensure fixfilepath feature is disabled. The fixfilepath feature sets a -ffile-prefix-map flag, which is only supported in clang-10. (Closes: #972751). @@ -13,7 +8,7 @@ llvm-toolchain-9 (1:9.0.1-15) unstable; urgency=medium * Don't use gold on ppc64el. It fails to build in that case (Closes: #972317) - -- Sylvestre Ledru Fri, 23 Oct 2020 09:14:16 +0200 + -- Sylvestre Ledru Sat, 31 Oct 2020 14:09:15 +0100 llvm-toolchain-9 (1:9.0.1-14) unstable; urgency=medium