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c35fc5bd15
* grub-core/Makefile.core.def (mda_text): New module. * grub-core/lib/legacy_parse.c (grub_legacy_parse): Support `hercules'. * grub-core/term/i386/vga_common.c (grub_console_cur_color): Moved to .. * grub-core/term/i386/pc/vga_text.c (cur_color): ... here * grub-core/term/i386/pc/console.c (grub_console_cur_color): ... and here. * grub-core/term/i386/vga_common.c (grub_console_getwh): Moved to .. * grub-core/term/i386/pc/vga_text.c (grub_console_getwh): ... here * grub-core/term/i386/pc/console.c (grub_console_getwh): ... and here. * grub-core/term/i386/vga_common.c (grub_console_setcolorstate): Moved to .. * grub-core/term/i386/pc/vga_text.c (grub_console_setcolorstate): ... here * grub-core/term/i386/pc/console.c (grub_console_setcolorstate): ... and here. * grub-core/term/i386/vga_common.c: Removed. * include/grub/i386/vga_common.h: Likewise. * include/grub/vga.h (grub_vga_cr_bw_write): New function. (grub_vga_cr_bw_read): Likewise. * include/grub/vgaregs.h (GRUB_VGA_IO_CR_BW_INDEX): New enum value. (GRUB_VGA_IO_CR_BW_DATA): Likewise. * grub-core/term/i386/pc/vga_text.c [MODE_MDA]: Call grub_vga_cr_bw_read/grub_vga_cr_bw_write instead of grub_vga_cr_read/grub_vga_cr_write. (grub_vga_text_setcolorstate) [MODE_MDA]: Ignore color.
308 lines
9.4 KiB
C
308 lines
9.4 KiB
C
/*
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* GRUB -- GRand Unified Bootloader
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* Copyright (C) 2010 Free Software Foundation, Inc.
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*
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* GRUB is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* GRUB is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with GRUB. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef GRUB_VGAREGS_HEADER
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#define GRUB_VGAREGS_HEADER 1
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#ifdef ASM_FILE
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#define GRUB_VGA_IO_SR_INDEX 0x3c4
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#define GRUB_VGA_IO_SR_DATA 0x3c5
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#else
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enum
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{
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GRUB_VGA_IO_CR_BW_INDEX = 0x3b4,
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GRUB_VGA_IO_CR_BW_DATA = 0x3b5,
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GRUB_VGA_IO_ARX = 0x3c0,
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GRUB_VGA_IO_ARX_READ = 0x3c1,
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GRUB_VGA_IO_MISC_WRITE = 0x3c2,
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GRUB_VGA_IO_SR_INDEX = 0x3c4,
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GRUB_VGA_IO_SR_DATA = 0x3c5,
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GRUB_VGA_IO_PIXEL_MASK = 0x3c6,
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GRUB_VGA_IO_PALLETTE_READ_INDEX = 0x3c7,
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GRUB_VGA_IO_PALLETTE_WRITE_INDEX = 0x3c8,
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GRUB_VGA_IO_PALLETTE_DATA = 0x3c9,
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GRUB_VGA_IO_GR_INDEX = 0x3ce,
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GRUB_VGA_IO_GR_DATA = 0x3cf,
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GRUB_VGA_IO_CR_INDEX = 0x3d4,
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GRUB_VGA_IO_CR_DATA = 0x3d5,
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GRUB_VGA_IO_INPUT_STATUS1_REGISTER = 0x3da
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};
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#define GRUB_VGA_IO_INPUT_STATUS1_VERTR_BIT 0x08
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enum
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{
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GRUB_VGA_CR_HTOTAL = 0x00,
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GRUB_VGA_CR_HORIZ_END = 0x01,
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GRUB_VGA_CR_HBLANK_START = 0x02,
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GRUB_VGA_CR_HBLANK_END = 0x03,
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GRUB_VGA_CR_HORIZ_SYNC_PULSE_START = 0x04,
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GRUB_VGA_CR_HORIZ_SYNC_PULSE_END = 0x05,
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GRUB_VGA_CR_VERT_TOTAL = 0x06,
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GRUB_VGA_CR_OVERFLOW = 0x07,
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GRUB_VGA_CR_BYTE_PANNING = 0x08,
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GRUB_VGA_CR_CELL_HEIGHT = 0x09,
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GRUB_VGA_CR_CURSOR_START = 0x0a,
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GRUB_VGA_CR_CURSOR_END = 0x0b,
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GRUB_VGA_CR_START_ADDR_HIGH_REGISTER = 0x0c,
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GRUB_VGA_CR_START_ADDR_LOW_REGISTER = 0x0d,
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GRUB_VGA_CR_CURSOR_ADDR_HIGH = 0x0e,
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GRUB_VGA_CR_CURSOR_ADDR_LOW = 0x0f,
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GRUB_VGA_CR_VSYNC_START = 0x10,
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GRUB_VGA_CR_VSYNC_END = 0x11,
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GRUB_VGA_CR_VDISPLAY_END = 0x12,
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GRUB_VGA_CR_PITCH = 0x13,
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GRUB_VGA_CR_UNDERLINE_LOCATION = 0x14,
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GRUB_VGA_CR_VERTICAL_BLANK_START = 0x15,
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GRUB_VGA_CR_VERTICAL_BLANK_END = 0x16,
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GRUB_VGA_CR_MODE = 0x17,
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GRUB_VGA_CR_LINE_COMPARE = 0x18,
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};
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enum
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{
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GRUB_VGA_CR_BYTE_PANNING_NORMAL = 0
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};
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enum
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{
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GRUB_VGA_CR_UNDERLINE_LOCATION_DWORD_MODE = 0x40
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};
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enum
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{
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GRUB_VGA_IO_MISC_COLOR = 0x01,
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GRUB_VGA_IO_MISC_ENABLE_VRAM_ACCESS = 0x02,
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GRUB_VGA_IO_MISC_28MHZ = 0x04,
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GRUB_VGA_IO_MISC_EXTERNAL_CLOCK_0 = 0x08,
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GRUB_VGA_IO_MISC_UPPER_64K = 0x20,
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GRUB_VGA_IO_MISC_NEGATIVE_HORIZ_POLARITY = 0x40,
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GRUB_VGA_IO_MISC_NEGATIVE_VERT_POLARITY = 0x80,
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};
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enum
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{
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GRUB_VGA_ARX_MODE = 0x10,
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GRUB_VGA_ARX_OVERSCAN = 0x11,
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GRUB_VGA_ARX_COLOR_PLANE_ENABLE = 0x12,
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GRUB_VGA_ARX_HORIZONTAL_PANNING = 0x13,
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GRUB_VGA_ARX_COLOR_SELECT = 0x14
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};
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enum
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{
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GRUB_VGA_ARX_MODE_TEXT = 0x00,
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GRUB_VGA_ARX_MODE_GRAPHICS = 0x01,
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GRUB_VGA_ARX_MODE_ENABLE_256COLOR = 0x40
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};
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#define GRUB_VGA_CR_WIDTH_DIVISOR 8
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#define GRUB_VGA_CR_OVERFLOW_VERT_DISPLAY_ENABLE_END1_SHIFT 7
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#define GRUB_VGA_CR_OVERFLOW_VERT_DISPLAY_ENABLE_END1_MASK 0x02
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#define GRUB_VGA_CR_OVERFLOW_VERT_DISPLAY_ENABLE_END2_SHIFT 3
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#define GRUB_VGA_CR_OVERFLOW_VERT_DISPLAY_ENABLE_END2_MASK 0x40
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#define GRUB_VGA_CR_OVERFLOW_VERT_TOTAL1_SHIFT 8
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#define GRUB_VGA_CR_OVERFLOW_VERT_TOTAL1_MASK 0x01
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#define GRUB_VGA_CR_OVERFLOW_VERT_TOTAL2_SHIFT 4
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#define GRUB_VGA_CR_OVERFLOW_VERT_TOTAL2_MASK 0x20
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#define GRUB_VGA_CR_OVERFLOW_VSYNC_START1_SHIFT 6
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#define GRUB_VGA_CR_OVERFLOW_VSYNC_START1_MASK 0x04
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#define GRUB_VGA_CR_OVERFLOW_VSYNC_START2_SHIFT 2
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#define GRUB_VGA_CR_OVERFLOW_VSYNC_START2_MASK 0x80
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#define GRUB_VGA_CR_OVERFLOW_HEIGHT1_SHIFT 7
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#define GRUB_VGA_CR_OVERFLOW_HEIGHT1_MASK 0x02
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#define GRUB_VGA_CR_OVERFLOW_HEIGHT2_SHIFT 3
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#define GRUB_VGA_CR_OVERFLOW_HEIGHT2_MASK 0xc0
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#define GRUB_VGA_CR_OVERFLOW_LINE_COMPARE_SHIFT 4
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#define GRUB_VGA_CR_OVERFLOW_LINE_COMPARE_MASK 0x10
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#define GRUB_VGA_CR_CELL_HEIGHT_LINE_COMPARE_MASK 0x40
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#define GRUB_VGA_CR_CELL_HEIGHT_LINE_COMPARE_SHIFT 3
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#define GRUB_VGA_CR_CELL_HEIGHT_VERTICAL_BLANK_MASK 0x20
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#define GRUB_VGA_CR_CELL_HEIGHT_VERTICAL_BLANK_SHIFT 4
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#define GRUB_VGA_CR_CELL_HEIGHT_DOUBLE_SCAN 0x80
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enum
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{
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GRUB_VGA_CR_CURSOR_START_DISABLE = (1 << 5)
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};
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#define GRUB_VGA_CR_PITCH_DIVISOR 8
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enum
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{
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GRUB_VGA_CR_MODE_NO_CGA = 0x01,
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GRUB_VGA_CR_MODE_NO_HERCULES = 0x02,
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GRUB_VGA_CR_MODE_ADDRESS_WRAP = 0x20,
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GRUB_VGA_CR_MODE_BYTE_MODE = 0x40,
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GRUB_VGA_CR_MODE_TIMING_ENABLE = 0x80
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};
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enum
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{
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GRUB_VGA_SR_RESET = 0,
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GRUB_VGA_SR_CLOCKING_MODE = 1,
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GRUB_VGA_SR_MAP_MASK_REGISTER = 2,
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GRUB_VGA_SR_CHAR_MAP_SELECT = 3,
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GRUB_VGA_SR_MEMORY_MODE = 4,
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};
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enum
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{
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GRUB_VGA_SR_RESET_ASYNC = 1,
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GRUB_VGA_SR_RESET_SYNC = 2
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};
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enum
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{
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GRUB_VGA_SR_CLOCKING_MODE_8_DOT_CLOCK = 1
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};
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enum
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{
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GRUB_VGA_SR_MEMORY_MODE_NORMAL = 0,
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GRUB_VGA_SR_MEMORY_MODE_EXTERNAL_VIDEO_MEMORY = 2,
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GRUB_VGA_SR_MEMORY_MODE_SEQUENTIAL_ADDRESSING = 4,
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GRUB_VGA_SR_MEMORY_MODE_CHAIN4 = 8,
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};
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enum
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{
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GRUB_VGA_GR_SET_RESET_PLANE = 0,
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GRUB_VGA_GR_SET_RESET_PLANE_ENABLE = 1,
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GRUB_VGA_GR_COLOR_COMPARE = 2,
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GRUB_VGA_GR_DATA_ROTATE = 3,
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GRUB_VGA_GR_READ_MAP_REGISTER = 4,
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GRUB_VGA_GR_MODE = 5,
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GRUB_VGA_GR_GR6 = 6,
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GRUB_VGA_GR_COLOR_COMPARE_DISABLE = 7,
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GRUB_VGA_GR_BITMASK = 8,
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GRUB_VGA_GR_MAX
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};
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#define GRUB_VGA_ALL_PLANES 0xf
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#define GRUB_VGA_NO_PLANES 0x0
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enum
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{
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GRUB_VGA_GR_DATA_ROTATE_NOP = 0
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};
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enum
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{
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GRUB_VGA_TEXT_TEXT_PLANE = 0,
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GRUB_VGA_TEXT_ATTR_PLANE = 1,
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GRUB_VGA_TEXT_FONT_PLANE = 2
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};
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enum
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{
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GRUB_VGA_GR_GR6_GRAPHICS_MODE = 1,
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GRUB_VGA_GR_GR6_MMAP_A0 = (1 << 2),
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GRUB_VGA_GR_GR6_MMAP_CGA = (3 << 2)
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};
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enum
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{
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GRUB_VGA_GR_MODE_READ_MODE1 = 0x08,
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GRUB_VGA_GR_MODE_ODD_EVEN = 0x10,
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GRUB_VGA_GR_MODE_ODD_EVEN_SHIFT = 0x20,
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GRUB_VGA_GR_MODE_256_COLOR = 0x40
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};
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struct grub_video_hw_config
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{
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unsigned vertical_total;
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unsigned vertical_blank_start;
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unsigned vertical_blank_end;
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unsigned vertical_sync_start;
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unsigned vertical_sync_end;
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unsigned line_compare;
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unsigned vdisplay_end;
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unsigned pitch;
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unsigned horizontal_total;
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unsigned horizontal_blank_start;
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unsigned horizontal_blank_end;
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unsigned horizontal_sync_pulse_start;
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unsigned horizontal_sync_pulse_end;
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unsigned horizontal_end;
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};
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static inline void
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grub_vga_set_geometry (struct grub_video_hw_config *config,
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void (*cr_write) (grub_uint8_t val, grub_uint8_t addr))
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{
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unsigned vertical_total = config->vertical_total - 2;
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unsigned vertical_blank_start = config->vertical_blank_start - 1;
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unsigned vdisplay_end = config->vdisplay_end - 1;
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grub_uint8_t overflow, cell_height_reg;
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/* Disable CR0-7 write protection. */
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cr_write (0, GRUB_VGA_CR_VSYNC_END);
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overflow = ((vertical_total >> GRUB_VGA_CR_OVERFLOW_VERT_TOTAL1_SHIFT)
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& GRUB_VGA_CR_OVERFLOW_VERT_TOTAL1_MASK)
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| ((vertical_total >> GRUB_VGA_CR_OVERFLOW_VERT_TOTAL2_SHIFT)
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& GRUB_VGA_CR_OVERFLOW_VERT_TOTAL2_MASK)
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| ((config->vertical_sync_start >> GRUB_VGA_CR_OVERFLOW_VSYNC_START2_SHIFT)
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& GRUB_VGA_CR_OVERFLOW_VSYNC_START2_MASK)
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| ((config->vertical_sync_start >> GRUB_VGA_CR_OVERFLOW_VSYNC_START1_SHIFT)
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& GRUB_VGA_CR_OVERFLOW_VSYNC_START1_MASK)
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| ((vdisplay_end >> GRUB_VGA_CR_OVERFLOW_VERT_DISPLAY_ENABLE_END1_SHIFT)
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& GRUB_VGA_CR_OVERFLOW_VERT_DISPLAY_ENABLE_END1_MASK)
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| ((vdisplay_end >> GRUB_VGA_CR_OVERFLOW_VERT_DISPLAY_ENABLE_END2_SHIFT)
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& GRUB_VGA_CR_OVERFLOW_VERT_DISPLAY_ENABLE_END2_MASK)
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| ((config->vertical_sync_start >> GRUB_VGA_CR_OVERFLOW_VSYNC_START1_SHIFT)
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& GRUB_VGA_CR_OVERFLOW_VSYNC_START1_MASK)
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| ((config->line_compare >> GRUB_VGA_CR_OVERFLOW_LINE_COMPARE_SHIFT)
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& GRUB_VGA_CR_OVERFLOW_LINE_COMPARE_MASK);
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cell_height_reg = ((vertical_blank_start
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>> GRUB_VGA_CR_CELL_HEIGHT_VERTICAL_BLANK_SHIFT)
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& GRUB_VGA_CR_CELL_HEIGHT_VERTICAL_BLANK_MASK)
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| ((config->line_compare >> GRUB_VGA_CR_CELL_HEIGHT_LINE_COMPARE_SHIFT)
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& GRUB_VGA_CR_CELL_HEIGHT_LINE_COMPARE_MASK);
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cr_write (config->horizontal_total - 1, GRUB_VGA_CR_HTOTAL);
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cr_write (config->horizontal_end - 1, GRUB_VGA_CR_HORIZ_END);
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cr_write (config->horizontal_blank_start - 1, GRUB_VGA_CR_HBLANK_START);
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cr_write (config->horizontal_blank_end, GRUB_VGA_CR_HBLANK_END);
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cr_write (config->horizontal_sync_pulse_start,
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GRUB_VGA_CR_HORIZ_SYNC_PULSE_START);
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cr_write (config->horizontal_sync_pulse_end,
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GRUB_VGA_CR_HORIZ_SYNC_PULSE_END);
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cr_write (vertical_total & 0xff, GRUB_VGA_CR_VERT_TOTAL);
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cr_write (overflow, GRUB_VGA_CR_OVERFLOW);
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cr_write (cell_height_reg, GRUB_VGA_CR_CELL_HEIGHT);
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cr_write (config->vertical_sync_start & 0xff, GRUB_VGA_CR_VSYNC_START);
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cr_write (config->vertical_sync_end & 0x0f, GRUB_VGA_CR_VSYNC_END);
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cr_write (vdisplay_end & 0xff, GRUB_VGA_CR_VDISPLAY_END);
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cr_write (config->pitch & 0xff, GRUB_VGA_CR_PITCH);
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cr_write (vertical_blank_start & 0xff, GRUB_VGA_CR_VERTICAL_BLANK_START);
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cr_write (config->vertical_blank_end & 0xff, GRUB_VGA_CR_VERTICAL_BLANK_END);
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cr_write (config->line_compare & 0xff, GRUB_VGA_CR_LINE_COMPARE);
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}
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#endif
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#endif
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