mirror of
https://git.proxmox.com/git/fwupd
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f56878ff88
This indicates the GUID in some way contributed to the result decided. It also allows us to match the submitted HSI results back to a firmware stream on the LVFS, which allows us to allow vendors to see a subset of results for uploaded devices.
291 lines
8.2 KiB
C
291 lines
8.2 KiB
C
/*
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* Copyright (C) 2020 Richard Hughes <richard@hughsie.com>
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*
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* SPDX-License-Identifier: LGPL-2.1+
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*/
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#include "config.h"
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#include <fwupdplugin.h>
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#include <cpuid.h>
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typedef union {
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guint32 data;
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struct {
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guint32 enabled : 1;
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guint32 rsrvd : 29;
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guint32 locked : 1;
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guint32 debug_occurred : 1;
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} __attribute__((packed)) fields;
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} FuMsrIa32Debug;
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typedef union {
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guint32 data;
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struct {
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guint32 unknown0 : 23; /* 0 -> 22 inc */
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guint32 sev_is_enabled : 1;
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guint32 unknown1 : 8;
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} __attribute__((packed)) fields;
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} FuMsrK8Syscfg;
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struct FuPluginData {
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gboolean ia32_debug_supported;
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FuMsrIa32Debug ia32_debug;
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gboolean k8_syscfg_supported;
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FuMsrK8Syscfg k8_syscfg;
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};
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#define PCI_MSR_IA32_DEBUG_INTERFACE 0xc80
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#define PCI_MSR_IA32_BIOS_SIGN_ID 0x8b
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#define PCI_MSR_K8_SYSCFG 0xC0010010
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void
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fu_plugin_init(FuPlugin *plugin)
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{
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fu_plugin_alloc_data(plugin, sizeof(FuPluginData));
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fu_plugin_set_build_hash(plugin, FU_BUILD_HASH);
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fu_plugin_add_udev_subsystem(plugin, "msr");
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}
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gboolean
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fu_plugin_startup(FuPlugin *plugin, GError **error)
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{
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FuPluginData *priv = fu_plugin_get_data(plugin);
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guint eax = 0;
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guint ecx = 0;
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/* sdbg is supported: https://en.wikipedia.org/wiki/CPUID */
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if (fu_common_get_cpu_vendor() == FU_CPU_VENDOR_INTEL) {
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if (!fu_common_cpuid(0x01, NULL, NULL, &ecx, NULL, error))
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return FALSE;
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priv->ia32_debug_supported = ((ecx >> 11) & 0x1) > 0;
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}
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/* indicates support for SEV */
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if (fu_common_get_cpu_vendor() == FU_CPU_VENDOR_AMD) {
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if (!fu_common_cpuid(0x8000001f, &eax, NULL, NULL, NULL, error))
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return FALSE;
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priv->k8_syscfg_supported = ((eax >> 0) & 0x1) > 0;
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}
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return TRUE;
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}
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gboolean
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fu_plugin_backend_device_added(FuPlugin *plugin, FuDevice *device, GError **error)
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{
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FuDevice *device_cpu = fu_plugin_cache_lookup(plugin, "cpu");
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FuPluginData *priv = fu_plugin_get_data(plugin);
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guint8 buf[8] = {0x0};
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g_autoptr(FuDeviceLocker) locker = NULL;
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g_autofree gchar *basename = NULL;
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/* interesting device? */
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if (!FU_IS_UDEV_DEVICE(device))
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return TRUE;
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if (g_strcmp0(fu_udev_device_get_subsystem(FU_UDEV_DEVICE(device)), "msr") != 0)
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return TRUE;
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/* we only care about the first processor */
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basename = g_path_get_basename(fu_udev_device_get_sysfs_path(FU_UDEV_DEVICE(device)));
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if (g_strcmp0(basename, "msr0") != 0)
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return TRUE;
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/* open the config */
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fu_device_set_physical_id(FU_DEVICE(device), "msr");
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locker = fu_device_locker_new(device, error);
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if (locker == NULL)
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return FALSE;
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/* grab MSR */
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if (priv->ia32_debug_supported) {
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if (!fu_udev_device_pread_full(FU_UDEV_DEVICE(device),
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PCI_MSR_IA32_DEBUG_INTERFACE,
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buf,
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sizeof(buf),
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error)) {
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g_prefix_error(error, "could not read IA32_DEBUG_INTERFACE: ");
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return FALSE;
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}
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if (!fu_common_read_uint32_safe(buf,
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sizeof(buf),
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0x0,
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&priv->ia32_debug.data,
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G_LITTLE_ENDIAN,
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error))
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return FALSE;
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g_debug("IA32_DEBUG_INTERFACE: enabled=%i, locked=%i, debug_occurred=%i",
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priv->ia32_debug.fields.enabled,
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priv->ia32_debug.fields.locked,
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priv->ia32_debug.fields.debug_occurred);
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}
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/* grab MSR */
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if (priv->k8_syscfg_supported) {
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if (!fu_udev_device_pread_full(FU_UDEV_DEVICE(device),
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PCI_MSR_K8_SYSCFG,
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buf,
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sizeof(buf),
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error)) {
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g_prefix_error(error, "could not read MSR_K8_SYSCFG: ");
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return FALSE;
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}
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if (!fu_common_read_uint32_safe(buf,
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sizeof(buf),
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0x0,
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&priv->k8_syscfg.data,
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G_LITTLE_ENDIAN,
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error))
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return FALSE;
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g_debug("MSR_K8_SYSCFG: sev_is_enabled=%i", priv->k8_syscfg.fields.sev_is_enabled);
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}
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/* get microcode version */
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if (device_cpu != NULL) {
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guint32 ver_raw;
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if (!fu_udev_device_pread_full(FU_UDEV_DEVICE(device),
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PCI_MSR_IA32_BIOS_SIGN_ID,
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buf,
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sizeof(buf),
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error)) {
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g_prefix_error(error, "could not read IA32_BIOS_SIGN_ID: ");
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return FALSE;
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}
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fu_common_dump_raw(G_LOG_DOMAIN, "IA32_BIOS_SIGN_ID", buf, sizeof(buf));
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if (!fu_common_read_uint32_safe(buf,
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sizeof(buf),
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0x4,
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&ver_raw,
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G_LITTLE_ENDIAN,
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error))
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return FALSE;
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if (ver_raw != 0) {
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FwupdVersionFormat verfmt = fu_device_get_version_format(device_cpu);
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g_autofree gchar *ver_str = NULL;
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ver_str = fu_common_version_from_uint32(ver_raw, verfmt);
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g_debug("setting microcode version to %s", ver_str);
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fu_device_set_version(device_cpu, ver_str);
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fu_device_set_version_raw(device_cpu, ver_raw);
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}
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}
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/* success */
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return TRUE;
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}
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void
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fu_plugin_device_registered(FuPlugin *plugin, FuDevice *dev)
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{
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if (g_strcmp0(fu_device_get_plugin(dev), "cpu") == 0) {
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fu_plugin_cache_add(plugin, "cpu", dev);
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return;
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}
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}
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static void
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fu_plugin_add_security_attr_dci_enabled(FuPlugin *plugin, FuSecurityAttrs *attrs)
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{
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FuPluginData *priv = fu_plugin_get_data(plugin);
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FuDevice *device = fu_plugin_cache_lookup(plugin, "cpu");
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g_autoptr(FwupdSecurityAttr) attr = NULL;
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/* this MSR is only valid for a subset of Intel CPUs */
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if (fu_common_get_cpu_vendor() != FU_CPU_VENDOR_INTEL)
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return;
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if (!priv->ia32_debug_supported)
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return;
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/* create attr */
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attr = fwupd_security_attr_new(FWUPD_SECURITY_ATTR_ID_INTEL_DCI_ENABLED);
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fwupd_security_attr_set_plugin(attr, fu_plugin_get_name(plugin));
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fwupd_security_attr_set_level(attr, FWUPD_SECURITY_ATTR_LEVEL_CRITICAL);
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if (device != NULL)
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fwupd_security_attr_add_guids(attr, fu_device_get_guids(device));
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fu_security_attrs_append(attrs, attr);
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/* check fields */
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if (priv->ia32_debug.fields.enabled) {
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fwupd_security_attr_set_result(attr, FWUPD_SECURITY_ATTR_RESULT_ENABLED);
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return;
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}
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/* success */
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fwupd_security_attr_add_flag(attr, FWUPD_SECURITY_ATTR_FLAG_SUCCESS);
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fwupd_security_attr_set_result(attr, FWUPD_SECURITY_ATTR_RESULT_NOT_ENABLED);
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}
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static void
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fu_plugin_add_security_attr_dci_locked(FuPlugin *plugin, FuSecurityAttrs *attrs)
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{
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FuPluginData *priv = fu_plugin_get_data(plugin);
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FuDevice *device = fu_plugin_cache_lookup(plugin, "cpu");
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g_autoptr(FwupdSecurityAttr) attr = NULL;
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/* this MSR is only valid for a subset of Intel CPUs */
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if (fu_common_get_cpu_vendor() != FU_CPU_VENDOR_INTEL)
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return;
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if (!priv->ia32_debug_supported)
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return;
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/* create attr */
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attr = fwupd_security_attr_new(FWUPD_SECURITY_ATTR_ID_INTEL_DCI_LOCKED);
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fwupd_security_attr_set_plugin(attr, fu_plugin_get_name(plugin));
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fwupd_security_attr_set_level(attr, FWUPD_SECURITY_ATTR_LEVEL_IMPORTANT);
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if (device != NULL)
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fwupd_security_attr_add_guids(attr, fu_device_get_guids(device));
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fu_security_attrs_append(attrs, attr);
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/* check fields */
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if (!priv->ia32_debug.fields.locked) {
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fwupd_security_attr_set_result(attr, FWUPD_SECURITY_ATTR_RESULT_NOT_LOCKED);
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return;
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}
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/* success */
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fwupd_security_attr_add_flag(attr, FWUPD_SECURITY_ATTR_FLAG_SUCCESS);
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fwupd_security_attr_set_result(attr, FWUPD_SECURITY_ATTR_RESULT_LOCKED);
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}
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static void
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fu_plugin_add_security_attr_amd_tsme_enabled(FuPlugin *plugin, FuSecurityAttrs *attrs)
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{
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FuPluginData *priv = fu_plugin_get_data(plugin);
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FuDevice *device = fu_plugin_cache_lookup(plugin, "cpu");
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g_autoptr(FwupdSecurityAttr) attr = NULL;
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/* this MSR is only valid for a subset of AMD CPUs */
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if (fu_common_get_cpu_vendor() != FU_CPU_VENDOR_AMD)
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return;
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/* create attr */
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attr = fwupd_security_attr_new(FWUPD_SECURITY_ATTR_ID_ENCRYPTED_RAM);
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fwupd_security_attr_set_plugin(attr, fu_plugin_get_name(plugin));
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fwupd_security_attr_set_level(attr, FWUPD_SECURITY_ATTR_LEVEL_SYSTEM_PROTECTION);
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if (device != NULL)
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fwupd_security_attr_add_guids(attr, fu_device_get_guids(device));
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fu_security_attrs_append(attrs, attr);
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/* check fields */
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if (!priv->k8_syscfg_supported) {
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fwupd_security_attr_set_result(attr, FWUPD_SECURITY_ATTR_RESULT_NOT_SUPPORTED);
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return;
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}
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if (!priv->k8_syscfg.fields.sev_is_enabled) {
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fwupd_security_attr_set_result(attr, FWUPD_SECURITY_ATTR_RESULT_NOT_ENABLED);
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return;
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}
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/* success */
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fwupd_security_attr_add_flag(attr, FWUPD_SECURITY_ATTR_FLAG_SUCCESS);
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fwupd_security_attr_set_result(attr, FWUPD_SECURITY_ATTR_RESULT_ENABLED);
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}
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void
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fu_plugin_add_security_attrs(FuPlugin *plugin, FuSecurityAttrs *attrs)
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{
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fu_plugin_add_security_attr_dci_enabled(plugin, attrs);
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fu_plugin_add_security_attr_dci_locked(plugin, attrs);
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fu_plugin_add_security_attr_amd_tsme_enabled(plugin, attrs);
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}
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