mirror of
https://git.proxmox.com/git/fwupd
synced 2025-05-25 09:26:21 +00:00
af9d9b3ffd
Reset the CMOS based on a private flag. Tested on coreboot using an offset of 123. Required when a CMOS layout or default option has changed as the resulting flash will have 0's for the modified option.
23 lines
472 B
C
23 lines
472 B
C
/*
|
|
* Copyright (C) 2021 Sean Rhodes <sean@starlabs.systems>
|
|
*
|
|
* SPDX-License-Identifier: LGPL-2.1+
|
|
*/
|
|
|
|
#pragma once
|
|
|
|
#include <fwupdplugin.h>
|
|
|
|
/* From coreboot's src/include/pc80/mc146818rtc.h file */
|
|
#define RTC_BASE_PORT 0x70
|
|
|
|
/*
|
|
* This is the offset of the first of the two checksum bytes
|
|
* we may want to figure out how we can determine this dynamically
|
|
* during execution.
|
|
*/
|
|
#define CMOS_CHECKSUM_OFFSET 123
|
|
|
|
gboolean
|
|
fu_flashrom_cmos_reset(GError **error);
|