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fwupd/plugins/msr
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Mario Limonciello 6ce4244edd trivial: fix reading the microcode version on AMD systems 
The kernel will issue a CPUID of 0x1 before reading microcode.
Align this behavior with the MSR plugin.

AMD and Intel align their microcode diffrently in MSR 0x8b.
* Intel it's 4 bytes in.
* AMD it's at the start of the MSR.
2022-09-13 11:10:45 -05:00
..
fu-plugin-msr.c trivial: fix reading the microcode version on AMD systems 2022-09-13 11:10:45 -05:00
fwupd-msr.conf msr: Add a new plugin to detect the Intel DCI state 2020-07-16 20:13:06 +01:00
meson.build Convert HSI into a meson tristate-feature 2022-08-22 06:03:38 -05:00
msr.conf Restore AMD SME check 2022-02-17 10:08:33 -06:00
msr.quirk Simplify the quirk file format 2021-03-03 08:30:34 +00:00
README.md trivial: update markdown for pre-commit style 2021-07-18 14:42:47 -05:00

README.md

MSR

Introduction

This plugin checks if the Model-specific registers (MSRs) indicate the Direct Connect Interface (DCI) is enabled.

DCI allows debugging of Intel processors using the USB3 port. DCI should always be disabled and locked on production hardware as it allows the attacker to disable other firmware protection methods.

The result will be stored in a security attribute for HSI.

External Interface Access

This plugin requires read access to /sys/class/msr.