Commit Graph

15 Commits

Author SHA1 Message Date
Richard Hughes
f56878ff88 Allow adding GUIDs to each HSI security attr
This indicates the GUID in some way contributed to the result decided.

It also allows us to match the submitted HSI results back to a firmware
stream on the LVFS, which allows us to allow vendors to see a subset of
results for uploaded devices.
2021-09-03 22:03:28 +01:00
Mario Limonciello
55de39c077 trivial: reformat the whole tree to match new format 2021-08-24 11:18:40 -05:00
Richard Hughes
d938ab62e6 trivial: Add fu_device_add_guid_full() to control behaviour 2021-07-12 19:01:55 +01:00
Richard Hughes
9c31d1fadd trivial: Set the FuContext on more devices 2021-07-12 19:01:55 +01:00
Mario Limonciello
73cdf067ed trivial: fixup includes for a variety of plugins 2021-06-14 10:12:45 +01:00
Richard Hughes
dd61689073 Add fu_device_add_security_attrs() 2021-03-28 17:54:19 +01:00
Richard Hughes
24232d1d63 pci-bcr: Use a plugin prefix for quirk keys 2021-03-03 08:30:34 +00:00
Richard Hughes
8307bd603e cpu: Directly probe the CPUID data to improve startup speed
This is much more efficient than parsing hundreds of lines of /proc/cpuinfo
and also causes hundreds of thousands less allocations at startup. For systems
with dozens of virtual CPUs the deduplication of device objects was increasing
start up time considerably.

Use the msr plugin to read the microcode version as this is not obtained using
CPUID, as it is instead being provided in an MSR.
2020-08-24 16:37:27 +01:00
Richard Hughes
3a095cdadf cpu: Use the extended IDs where required 2020-08-24 16:37:27 +01:00
Richard Hughes
8667c7e816 cpu: Use the proper vendor name rather than the signature 2020-08-24 16:37:27 +01:00
Richard Hughes
bd1dc2a1e2 pcb-bcr: Use the correct BCR register for Bay Trail CPUs
Fixes https://github.com/fwupd/fwupd/issues/2328
2020-08-20 22:07:05 +01:00
Richard Hughes
c821923668 Add an HSI attribute for Intel SMAP
See https://en.wikipedia.org/wiki/Supervisor_Mode_Access_Prevention for details.
2020-05-22 07:26:47 +01:00
Mario Limonciello
983263bc8d cpu: Add support for a security attribute related to Intel TME
This only checks that it was available from the CPU.
To be complete an additional check should be made to show that it
was actually enabled from the firmware.

This will require a kernel modification though because MSR access
will be forbidden from userland while in kernel lockdown.
2020-05-15 07:16:17 -05:00
Richard Hughes
2d6456e019 cpu: Parse the CPU flags to detect the CET status
New enough hardware to have this feature isn't going to be in the marketplace
for a while. To use that newer hardware requires a very recent kernel (5.6 at
least, although it will probably be at least 5.9 by the time the hardware is
released).

The CET status will be used in future functionality.
2020-05-06 18:15:28 +01:00
Mario Limonciello
5972a49495 Add a new plugin for CPU microcode 2020-03-09 09:04:38 +00:00