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steelseries: fizz: Add missing command definitions
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Gaël PORTAY
Gaël PORTAY
parent
87f2807dfb
commit
fe3649ee6a
@ -28,15 +28,19 @@
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#define STEELSERIES_FIZZ_VERSION_COMMAND_OFFSET 0x00U
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#define STEELSERIES_FIZZ_VERSION_MODE_OFFSET 0x01U
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#define STEELSERIES_FIZZ_BATTERY_LEVEL_COMMAND 0x92U
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#define STEELSERIES_FIZZ_BATTERY_LEVEL_COMMAND_OFFSET 0x00U
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#define STEELSERIES_FIZZ_BATTERY_LEVEL_LEVEL_OFFSET 0x01U
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#define STEELSERIES_FIZZ_PAIRED_STATUS_COMMAND 0xBBU
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#define STEELSERIES_FIZZ_PAIRED_STATUS_COMMAND_OFFSET 0x00U
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#define STEELSERIES_FIZZ_PAIRED_STATUS_STATUS_OFFSET 0x01U
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#define STEELSERIES_FIZZ_CONNECTION_STATUS_COMMAND 0xBCU
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#define STEELSERIES_FIZZ_CONNECTION_STATUS_COMMAND_OFFSET 0x00U
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#define STEELSERIES_FIZZ_CONNECTION_STATUS_STATUS_OFFSET 0x01U
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#define STEELSERIES_FIZZ_WRITE_ACCESS_FILE_COMMAND 0x03U
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#define STEELSERIES_FIZZ_WRITE_ACCESS_FILE_COMMAND_OFFSET 0x00U
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#define STEELSERIES_FIZZ_WRITE_ACCESS_FILE_FILESYSTEM_OFFSET 0x01U
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#define STEELSERIES_FIZZ_WRITE_ACCESS_FILE_ID_OFFSET 0x02U
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@ -44,6 +48,7 @@
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#define STEELSERIES_FIZZ_WRITE_ACCESS_FILE_OFFSET_OFFSET 0x05U
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#define STEELSERIES_FIZZ_WRITE_ACCESS_FILE_DATA_OFFSET 0x09U
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#define STEELSERIES_FIZZ_READ_ACCESS_FILE_COMMAND 0x83U
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#define STEELSERIES_FIZZ_READ_ACCESS_FILE_COMMAND_OFFSET 0x00U
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#define STEELSERIES_FIZZ_READ_ACCESS_FILE_FILESYSTEM_OFFSET 0x01U
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#define STEELSERIES_FIZZ_READ_ACCESS_FILE_ID_OFFSET 0x02U
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@ -51,13 +56,22 @@
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#define STEELSERIES_FIZZ_READ_ACCESS_FILE_OFFSET_OFFSET 0x05U
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#define STEELSERIES_FIZZ_READ_ACCESS_FILE_DATA_OFFSET 0x02U
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#define STEELSERIES_FIZZ_ERASE_FILE_COMMAND 0x02U
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#define STEELSERIES_FIZZ_ERASE_FILE_COMMAND_OFFSET 0x0U
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#define STEELSERIES_FIZZ_ERASE_FILE_FILESYSTEM_OFFSET 0x1U
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#define STEELSERIES_FIZZ_ERASE_FILE_ID_OFFSET 0x2U
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#define STEELSERIES_FIZZ_RESET_COMMAND 0x01U
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#define STEELSERIES_FIZZ_RESET_COMMAND_OFFSET 0x0U
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#define STEELSERIES_FIZZ_RESET_MODE_OFFSET 0x1U
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#define STEELSERIES_FIZZ_FILE_CRC32_COMMAND 0x84U
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#define STEELSERIES_FIZZ_FILE_CRC32_COMMAND_OFFSET 0x00U
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#define STEELSERIES_FIZZ_FILE_CRC32_FILESYSTEM_OFFSET 0x01U
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#define STEELSERIES_FIZZ_FILE_CRC32_ID_OFFSET 0x02U
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#define STEELSERIES_FIZZ_FILE_CRC32_CALCULATED_CRC_OFFSET 0x02U
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#define STEELSERIES_FIZZ_FILE_CRC32_STORED_CRC_OFFSET 0x06U
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struct _FuSteelseriesFizz {
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FuSteelseriesDevice parent_instance;
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};
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@ -178,7 +192,7 @@ gchar *
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fu_steelseries_fizz_version(FuDevice *device, gboolean tunnel, GError **error)
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{
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guint8 data[STEELSERIES_BUFFER_CONTROL_SIZE] = {0};
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guint16 cmd = 0x90U;
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guint16 cmd = STEELSERIES_FIZZ_VERSION_COMMAND;
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const guint8 mode = 0U; /* string */
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if (tunnel)
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@ -219,7 +233,7 @@ fu_steelseries_fizz_write_access_file(FuDevice *device,
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FuProgress *progress,
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GError **error)
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{
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guint16 cmd = 0x03U;
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guint16 cmd = STEELSERIES_FIZZ_WRITE_ACCESS_FILE_COMMAND;
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guint8 data[STEELSERIES_BUFFER_CONTROL_SIZE] = {0};
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g_autoptr(GPtrArray) chunks = NULL;
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@ -304,7 +318,7 @@ fu_steelseries_fizz_erase_file(FuDevice *device,
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GError **error)
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{
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guint8 data[STEELSERIES_BUFFER_CONTROL_SIZE] = {0};
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guint16 cmd = 0x02U;
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guint16 cmd = STEELSERIES_FIZZ_ERASE_FILE_COMMAND;
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if (tunnel)
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cmd |= STEELSERIES_FIZZ_COMMAND_TUNNEL_BIT;
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@ -345,7 +359,7 @@ gboolean
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fu_steelseries_fizz_reset(FuDevice *device, gboolean tunnel, guint8 mode, GError **error)
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{
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guint8 data[STEELSERIES_BUFFER_CONTROL_SIZE] = {0};
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guint16 cmd = 0x01U;
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guint16 cmd = STEELSERIES_FIZZ_RESET_COMMAND;
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if (tunnel)
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cmd |= STEELSERIES_FIZZ_COMMAND_TUNNEL_BIT;
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@ -383,18 +397,31 @@ fu_steelseries_fizz_file_crc32(FuDevice *device,
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GError **error)
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{
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guint8 data[STEELSERIES_BUFFER_CONTROL_SIZE] = {0};
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guint16 cmd = 0x84U;
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guint16 cmd = STEELSERIES_FIZZ_FILE_CRC32_COMMAND;
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if (tunnel)
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cmd |= STEELSERIES_FIZZ_COMMAND_TUNNEL_BIT;
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if (!fu_common_write_uint8_safe(data, sizeof(data), 0x00U, cmd, error))
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if (!fu_common_write_uint8_safe(data,
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sizeof(data),
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STEELSERIES_FIZZ_FILE_CRC32_COMMAND_OFFSET,
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cmd,
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error))
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return FALSE;
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if (!fu_common_write_uint8_safe(data, sizeof(data), 0x01U, fs, error))
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if (!fu_common_write_uint8_safe(data,
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sizeof(data),
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STEELSERIES_FIZZ_FILE_CRC32_FILESYSTEM_OFFSET,
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fs,
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error))
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return FALSE;
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if (!fu_common_write_uint8_safe(data, sizeof(data), 0x02U, id, error))
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if (!fu_common_write_uint8_safe(data,
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sizeof(data),
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STEELSERIES_FIZZ_FILE_CRC32_ID_OFFSET,
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id,
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error))
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return FALSE;
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if (g_getenv("FWUPD_STEELSERIES_FIZZ_VERBOSE") != NULL)
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@ -406,7 +433,7 @@ fu_steelseries_fizz_file_crc32(FuDevice *device,
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if (!fu_common_read_uint32_safe(data,
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sizeof(data),
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0x02U,
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STEELSERIES_FIZZ_FILE_CRC32_CALCULATED_CRC_OFFSET,
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calculated_crc,
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G_LITTLE_ENDIAN,
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error))
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@ -414,7 +441,7 @@ fu_steelseries_fizz_file_crc32(FuDevice *device,
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if (!fu_common_read_uint32_safe(data,
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sizeof(data),
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0x06U,
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STEELSERIES_FIZZ_FILE_CRC32_STORED_CRC_OFFSET,
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stored_crc,
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G_LITTLE_ENDIAN,
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error))
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@ -434,7 +461,7 @@ fu_steelseries_fizz_read_access_file(FuDevice *device,
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FuProgress *progress,
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GError **error)
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{
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guint16 cmd = 0x83U;
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guint16 cmd = STEELSERIES_FIZZ_READ_ACCESS_FILE_COMMAND;
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guint8 data[STEELSERIES_BUFFER_CONTROL_SIZE] = {0};
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g_autoptr(GPtrArray) chunks = NULL;
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@ -515,7 +542,7 @@ gboolean
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fu_steelseries_fizz_battery_level(FuDevice *device, gboolean tunnel, guint8 *level, GError **error)
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{
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guint8 data[STEELSERIES_BUFFER_CONTROL_SIZE] = {0};
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guint16 cmd = 0x92U;
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guint16 cmd = STEELSERIES_FIZZ_BATTERY_LEVEL_COMMAND;
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if (tunnel)
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cmd |= STEELSERIES_FIZZ_COMMAND_TUNNEL_BIT;
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@ -549,7 +576,7 @@ gboolean
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fu_steelseries_fizz_paired_status(FuDevice *device, guint8 *status, GError **error)
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{
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guint8 data[STEELSERIES_BUFFER_CONTROL_SIZE] = {0};
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const guint16 cmd = 0xBBU;
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const guint16 cmd = STEELSERIES_FIZZ_PAIRED_STATUS_COMMAND;
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if (!fu_common_write_uint8_safe(data,
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sizeof(data),
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@ -580,7 +607,7 @@ gboolean
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fu_steelseries_fizz_connection_status(FuDevice *device, guint8 *status, GError **error)
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{
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guint8 data[STEELSERIES_BUFFER_CONTROL_SIZE] = {0};
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const guint16 cmd = 0xBCU;
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const guint16 cmd = STEELSERIES_FIZZ_CONNECTION_STATUS_COMMAND;
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if (!fu_common_write_uint8_safe(data,
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sizeof(data),
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