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906da88291
Configurations w/o vecbase may have vectors not grouped together and not in fixed order. They may not always be grouped into single output sections by assigning next offset to dot, as it may sometimes move dot backwards and sometimes they may even belong to different memory region. Don't group vectors into single output section. Instead put each vector into its own section ant put it at its default virtual address. Reserve 4KBytes from the default vectors base and put rest of the code and data starting from there. Mark vectors sections as executable, otherwise their contents is discarded. There may be as little as 16 bytes reserved for some vectors, load handler address into a0 and use ret.n to jump there to make vector code fit into this 16 byte space. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
66 lines
1.1 KiB
ArmAsm
66 lines
1.1 KiB
ArmAsm
#include "core-isa.h"
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.macro vector name
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.section .vector.\name, "ax"
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.global vector_\name
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vector_\name\():
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j 1f
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.literal_position
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1:
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wsr a0, excsave1
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movi a0, 1f
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ret.n
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.section .vector.\name\().text, "ax"
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.literal_position
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1:
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rsr a0, excsave1
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wsr a2, excsave1
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movi a2, handler_\name
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l32i a2, a2, 0
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beqz a2, 1f
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jx a2
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1:
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movi a3, 1b
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movi a2, 1
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simcall
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.align 4
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.global handler_\name
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handler_\name\(): .word 0
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.endm
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#if XCHAL_HAVE_WINDOWED
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vector window_overflow_4
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vector window_overflow_8
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vector window_overflow_12
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vector window_underflow_4
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vector window_underflow_8
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vector window_underflow_12
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#endif
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#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 2
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vector level2
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#endif
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#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 3
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vector level3
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#endif
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#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 4
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vector level4
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#endif
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#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 5
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vector level5
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#endif
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#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 6
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vector level6
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#endif
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#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 7
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vector level7
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#endif
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vector kernel
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vector user
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vector double
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