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9c98822619
Make interrupt tests conditional on the presence of interrupt option and on the presence of level-1 and high level software interrupts. Don't use hard-coded interrupt level for the high level interrupt tests, choose high level software IRQ and use its configured level. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
260 lines
5.1 KiB
ArmAsm
260 lines
5.1 KiB
ArmAsm
#include "macros.inc"
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#define LSBIT(v) ((v) & -(v))
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#define LEVEL_MASK(x) glue3(XCHAL_INTLEVEL, x, _MASK)
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#define LEVEL_SOFT_MASK(x) (LEVEL_MASK(x) & XCHAL_INTTYPE_MASK_SOFTWARE)
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#define L1_SOFT_MASK LEVEL_SOFT_MASK(1)
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#define L1_SOFT LSBIT(L1_SOFT_MASK)
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#if LEVEL_SOFT_MASK(2)
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#define HIGH_LEVEL_SOFT_MASK LEVEL_SOFT_MASK(2)
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#elif LEVEL_SOFT_MASK(3)
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#define HIGH_LEVEL_SOFT_MASK LEVEL_SOFT_MASK(3)
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#elif LEVEL_SOFT_MASK(4)
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#define HIGH_LEVEL_SOFT_MASK LEVEL_SOFT_MASK(4)
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#elif LEVEL_SOFT_MASK(5)
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#define HIGH_LEVEL_SOFT_MASK LEVEL_SOFT_MASK(5)
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#elif LEVEL_SOFT_MASK(6)
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#define HIGH_LEVEL_SOFT_MASK LEVEL_SOFT_MASK(6)
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#else
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#define HIGH_LEVEL_SOFT_MASK 0
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#endif
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#define HIGH_LEVEL_SOFT LSBIT(HIGH_LEVEL_SOFT_MASK)
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#if LEVEL_SOFT_MASK(2)
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#define HIGH_LEVEL_SOFT_LEVEL 2
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#elif LEVEL_SOFT_MASK(3)
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#define HIGH_LEVEL_SOFT_LEVEL 3
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#elif LEVEL_SOFT_MASK(4)
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#define HIGH_LEVEL_SOFT_LEVEL 4
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#elif LEVEL_SOFT_MASK(5)
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#define HIGH_LEVEL_SOFT_LEVEL 5
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#elif LEVEL_SOFT_MASK(6)
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#define HIGH_LEVEL_SOFT_LEVEL 6
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#else
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#define HIGH_LEVEL_SOFT_LEVEL 0
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#endif
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test_suite interrupt
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#if XCHAL_HAVE_INTERRUPTS
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.macro clear_interrupts
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movi a2, 0
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wsr a2, intenable
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#if XCHAL_NUM_TIMERS
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wsr a2, ccompare0
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#endif
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#if XCHAL_NUM_TIMERS > 1
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wsr a2, ccompare1
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#endif
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#if XCHAL_NUM_TIMERS > 2
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wsr a2, ccompare2
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#endif
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esync
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rsr a2, interrupt
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wsr a2, intclear
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esync
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rsr a2, interrupt
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assert eqi, a2, 0
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.endm
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.macro check_l1
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rsr a2, ps
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movi a3, 0x1f /* EXCM | INTMASK */
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and a2, a2, a3
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assert eqi, a2, 0x10 /* only EXCM is set for level-1 interrupt */
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rsr a2, exccause
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assert eqi, a2, 4
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.endm
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test rsil
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clear_interrupts
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rsr a2, ps
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rsil a3, 7
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rsr a4, ps
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assert eq, a2, a3
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movi a2, 0xf
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and a2, a4, a2
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assert eqi, a2, 7
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xor a3, a3, a4
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movi a2, 0xfffffff0
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and a2, a3, a2
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assert eqi, a2, 0
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test_end
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#if L1_SOFT
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test soft_disabled
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set_vector kernel, 1f
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clear_interrupts
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movi a2, L1_SOFT
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wsr a2, intset
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esync
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rsr a3, interrupt
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movi a4, ~XCHAL_INTTYPE_MASK_TIMER
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and a3, a3, a4
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assert eq, a2, a3
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wsr a2, intclear
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esync
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rsr a3, interrupt
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and a3, a3, a4
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assert eqi, a3, 0
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j 2f
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1:
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test_fail
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2:
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test_end
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test soft_intenable
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set_vector kernel, 1f
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clear_interrupts
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movi a2, L1_SOFT
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wsr a2, intset
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esync
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rsr a3, interrupt
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movi a4, ~XCHAL_INTTYPE_MASK_TIMER
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and a3, a3, a4
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assert eq, a2, a3
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rsil a3, 0
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wsr a2, intenable
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esync
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test_fail
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1:
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check_l1
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test_end
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test soft_rsil
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set_vector kernel, 1f
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clear_interrupts
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movi a2, L1_SOFT
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wsr a2, intset
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esync
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rsr a3, interrupt
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movi a4, ~XCHAL_INTTYPE_MASK_TIMER
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and a3, a3, a4
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assert eq, a2, a3
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wsr a2, intenable
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rsil a3, 0
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esync
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test_fail
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1:
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check_l1
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test_end
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test soft_waiti
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set_vector kernel, 1f
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clear_interrupts
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movi a2, L1_SOFT
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wsr a2, intset
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esync
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rsr a3, interrupt
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movi a4, ~XCHAL_INTTYPE_MASK_TIMER
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and a3, a3, a4
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assert eq, a2, a3
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wsr a2, intenable
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waiti 0
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test_fail
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1:
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check_l1
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test_end
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test soft_user
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set_vector kernel, 1f
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set_vector user, 2f
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clear_interrupts
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movi a2, L1_SOFT
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wsr a2, intset
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esync
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rsr a3, interrupt
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movi a4, ~XCHAL_INTTYPE_MASK_TIMER
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and a3, a3, a4
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assert eq, a2, a3
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wsr a2, intenable
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rsr a2, ps
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movi a3, 0x20
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or a2, a2, a3
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wsr a2, ps
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waiti 0
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1:
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test_fail
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2:
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check_l1
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test_end
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#if HIGH_LEVEL_SOFT
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test soft_priority
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set_vector kernel, 1f
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set_vector glue(level, HIGH_LEVEL_SOFT_LEVEL), 2f
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clear_interrupts
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movi a2, L1_SOFT | HIGH_LEVEL_SOFT
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wsr a2, intenable
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rsil a3, 0
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esync
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wsr a2, intset
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esync
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1:
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test_fail
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2:
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rsr a2, ps
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movi a3, 0x1f /* EXCM | INTMASK */
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and a2, a2, a3
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movi a3, 0x10 | HIGH_LEVEL_SOFT_LEVEL
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assert eq, a2, a3 /* EXCM and INTMASK are set
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for high-priority interrupt */
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test_end
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#endif
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#endif
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#if HIGH_LEVEL_SOFT
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test eps_epc_rfi
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set_vector glue(level, HIGH_LEVEL_SOFT_LEVEL), 3f
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clear_interrupts
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reset_ps
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movi a2, L1_SOFT_MASK | HIGH_LEVEL_SOFT_MASK
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wsr a2, intenable
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rsil a3, 0
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rsr a3, ps
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esync
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wsr a2, intset
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1:
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esync
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2:
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test_fail
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3:
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rsr a2, glue(eps, HIGH_LEVEL_SOFT_LEVEL)
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assert eq, a2, a3
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rsr a2, glue(epc, HIGH_LEVEL_SOFT_LEVEL)
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movi a3, 1b
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assert ge, a2, a3
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movi a3, 2b
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assert ge, a3, a2
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movi a2, 4f
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wsr a2, glue(epc, HIGH_LEVEL_SOFT_LEVEL)
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movi a2, 0x40000 | HIGH_LEVEL_SOFT_LEVEL
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wsr a2, glue(eps, HIGH_LEVEL_SOFT_LEVEL)
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rfi HIGH_LEVEL_SOFT_LEVEL
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test_fail
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4:
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rsr a2, ps
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movi a3, 0x40000 | HIGH_LEVEL_SOFT_LEVEL
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assert eq, a2, a3
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test_end
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#endif
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#endif
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test_suite_end
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