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		3539d84df1
		
	
	
	
	
		
			
			It may be arm-compat-semihosting but more than one architecture uses it so lets move the tests into the multiarch area. We gate it on the feature and split the semicall.h header between the arches. Also clean-up a bit of the Makefile messing about to one common set of runners. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210323165308.15244-6-alex.bennee@linaro.org>
		
			
				
	
	
		
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			23 lines
		
	
	
		
			524 B
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Semihosting Tests - RiscV64 Helper
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|  *
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|  * Copyright (c) 2021
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|  * Written by Alex Bennée <alex.bennee@linaro.org>
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|  *
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|  * SPDX-License-Identifier: GPL-3.0-or-later
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|  */
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| 
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| uintptr_t __semi_call(uintptr_t type, uintptr_t arg0)
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| {
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|     register uintptr_t t asm("a0") = type;
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|     register uintptr_t a0 asm("a1") = arg0;
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|     asm(".option norvc\n\t"
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|         ".balign 16\n\t"
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|         "slli zero, zero, 0x1f\n\t"
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|         "ebreak\n\t"
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|         "srai zero, zero, 0x7\n\t"
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|         : "=r" (t)
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|         : "r" (t), "r" (a0));
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|     return t;
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| }
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