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	 c227f0995e
			
		
	
	
		c227f0995e
		
	
	
	
	
		
			
			In the very least, a change like this requires discussion on the list.
The naming convention is goofy and it causes a massive merge problem.  Something
like this _must_ be presented on the list first so people can provide input
and cope with it.
This reverts commit 99a0949b72.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
		
	
			
		
			
				
	
	
		
			55 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			55 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* NOR flash devices */
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| typedef struct pflash_t pflash_t;
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| 
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| /* pflash_cfi01.c */
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| pflash_t *pflash_cfi01_register(target_phys_addr_t base, ram_addr_t off,
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|                                 BlockDriverState *bs,
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|                                 uint32_t sector_len, int nb_blocs, int width,
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|                                 uint16_t id0, uint16_t id1,
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|                                 uint16_t id2, uint16_t id3);
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| 
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| /* pflash_cfi02.c */
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| pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off,
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|                                 BlockDriverState *bs, uint32_t sector_len,
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|                                 int nb_blocs, int nb_mappings, int width,
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|                                 uint16_t id0, uint16_t id1,
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|                                 uint16_t id2, uint16_t id3,
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|                                 uint16_t unlock_addr0, uint16_t unlock_addr1);
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| 
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| /* nand.c */
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| typedef struct NANDFlashState NANDFlashState;
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| NANDFlashState *nand_init(int manf_id, int chip_id);
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| void nand_done(NANDFlashState *s);
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| void nand_setpins(NANDFlashState *s,
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|                 int cle, int ale, int ce, int wp, int gnd);
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| void nand_getpins(NANDFlashState *s, int *rb);
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| void nand_setio(NANDFlashState *s, uint8_t value);
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| uint8_t nand_getio(NANDFlashState *s);
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| 
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| #define NAND_MFR_TOSHIBA	0x98
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| #define NAND_MFR_SAMSUNG	0xec
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| #define NAND_MFR_FUJITSU	0x04
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| #define NAND_MFR_NATIONAL	0x8f
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| #define NAND_MFR_RENESAS	0x07
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| #define NAND_MFR_STMICRO	0x20
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| #define NAND_MFR_HYNIX		0xad
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| #define NAND_MFR_MICRON		0x2c
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| 
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| /* onenand.c */
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| void onenand_base_update(void *opaque, target_phys_addr_t new);
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| void onenand_base_unmap(void *opaque);
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| void *onenand_init(uint32_t id, int regshift, qemu_irq irq);
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| void *onenand_raw_otp(void *opaque);
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| 
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| /* ecc.c */
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| typedef struct {
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|     uint8_t cp;		/* Column parity */
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|     uint16_t lp[2];	/* Line parity */
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|     uint16_t count;
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| } ECCState;
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| 
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| uint8_t ecc_digest(ECCState *s, uint8_t sample);
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| void ecc_reset(ECCState *s);
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| void ecc_put(QEMUFile *f, ECCState *s);
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| void ecc_get(QEMUFile *f, ECCState *s);
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