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	 0701a5efa0
			
		
	
	
		0701a5efa0
		
	
	
	
	
		
			
			Add basic USB PHY support as implemented in i.MX23, i.MX28, i.MX6, and i.MX7 SoCs. The only support really needed - at least to boot Linux - is support for soft reset, which needs to reset various registers to their initial value. Otherwise, just record register values. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20200313014551.12554-2-linux@roeck-us.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
		
			
				
	
	
		
			54 lines
		
	
	
		
			1.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			54 lines
		
	
	
		
			1.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| #ifndef IMX_USB_PHY_H
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| #define IMX_USB_PHY_H
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| 
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| #include "hw/sysbus.h"
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| #include "qemu/bitops.h"
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| 
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| enum IMXUsbPhyRegisters {
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|     USBPHY_PWD,
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|     USBPHY_PWD_SET,
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|     USBPHY_PWD_CLR,
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|     USBPHY_PWD_TOG,
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|     USBPHY_TX,
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|     USBPHY_TX_SET,
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|     USBPHY_TX_CLR,
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|     USBPHY_TX_TOG,
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|     USBPHY_RX,
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|     USBPHY_RX_SET,
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|     USBPHY_RX_CLR,
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|     USBPHY_RX_TOG,
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|     USBPHY_CTRL,
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|     USBPHY_CTRL_SET,
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|     USBPHY_CTRL_CLR,
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|     USBPHY_CTRL_TOG,
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|     USBPHY_STATUS,
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|     USBPHY_DEBUG = 0x14,
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|     USBPHY_DEBUG_SET,
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|     USBPHY_DEBUG_CLR,
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|     USBPHY_DEBUG_TOG,
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|     USBPHY_DEBUG0_STATUS,
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|     USBPHY_DEBUG1 = 0x1c,
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|     USBPHY_DEBUG1_SET,
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|     USBPHY_DEBUG1_CLR,
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|     USBPHY_DEBUG1_TOG,
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|     USBPHY_VERSION,
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|     USBPHY_MAX
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| };
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| 
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| #define USBPHY_CTRL_SFTRST BIT(31)
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| 
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| #define TYPE_IMX_USBPHY "imx.usbphy"
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| #define IMX_USBPHY(obj) OBJECT_CHECK(IMXUSBPHYState, (obj), TYPE_IMX_USBPHY)
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| 
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| typedef struct IMXUSBPHYState {
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|     /* <private> */
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|     SysBusDevice parent_obj;
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| 
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|     /* <public> */
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|     MemoryRegion iomem;
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| 
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|     uint32_t usbphy[USBPHY_MAX];
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| } IMXUSBPHYState;
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| 
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| #endif /* IMX_USB_PHY_H */
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