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ec150c7e09
Back in 2016, we discussed[1] rules for headers, and these were
generally liked:
1. Have a carefully curated header that's included everywhere first. We
got that already thanks to Peter: osdep.h.
2. Headers should normally include everything they need beyond osdep.h.
If exceptions are needed for some reason, they must be documented in
the header. If all that's needed from a header is typedefs, put
those into qemu/typedefs.h instead of including the header.
3. Cyclic inclusion is forbidden.
This patch gets include/ closer to obeying 2.
It's actually extracted from my "[RFC] Baby steps towards saner
headers" series[2], which demonstrates a possible path towards
checking 2 automatically. It passes the RFC test there.
[1] Message-ID: <87h9g8j57d.fsf@blackfin.pond.sub.org>
https://lists.nongnu.org/archive/html/qemu-devel/2016-03/msg03345.html
[2] Message-Id: <20190711122827.18970-1-armbru@redhat.com>
https://lists.nongnu.org/archive/html/qemu-devel/2019-07/msg02715.html
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20190812052359.30071-2-armbru@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
84 lines
2.7 KiB
C
84 lines
2.7 KiB
C
#ifndef HW_FLASH_H
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#define HW_FLASH_H
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/* NOR flash devices */
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#include "exec/memory.h"
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#include "migration/vmstate.h"
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/* pflash_cfi01.c */
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#define TYPE_PFLASH_CFI01 "cfi.pflash01"
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#define PFLASH_CFI01(obj) \
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OBJECT_CHECK(PFlashCFI01, (obj), TYPE_PFLASH_CFI01)
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typedef struct PFlashCFI01 PFlashCFI01;
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PFlashCFI01 *pflash_cfi01_register(hwaddr base,
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const char *name,
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hwaddr size,
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BlockBackend *blk,
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uint32_t sector_len,
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int width,
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uint16_t id0, uint16_t id1,
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uint16_t id2, uint16_t id3,
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int be);
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BlockBackend *pflash_cfi01_get_blk(PFlashCFI01 *fl);
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MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl);
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void pflash_cfi01_legacy_drive(PFlashCFI01 *dev, DriveInfo *dinfo);
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/* pflash_cfi02.c */
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#define TYPE_PFLASH_CFI02 "cfi.pflash02"
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#define PFLASH_CFI02(obj) \
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OBJECT_CHECK(PFlashCFI02, (obj), TYPE_PFLASH_CFI02)
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typedef struct PFlashCFI02 PFlashCFI02;
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PFlashCFI02 *pflash_cfi02_register(hwaddr base,
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const char *name,
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hwaddr size,
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BlockBackend *blk,
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uint32_t sector_len,
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int nb_mappings,
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int width,
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uint16_t id0, uint16_t id1,
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uint16_t id2, uint16_t id3,
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uint16_t unlock_addr0,
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uint16_t unlock_addr1,
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int be);
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/* nand.c */
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DeviceState *nand_init(BlockBackend *blk, int manf_id, int chip_id);
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void nand_setpins(DeviceState *dev, uint8_t cle, uint8_t ale,
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uint8_t ce, uint8_t wp, uint8_t gnd);
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void nand_getpins(DeviceState *dev, int *rb);
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void nand_setio(DeviceState *dev, uint32_t value);
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uint32_t nand_getio(DeviceState *dev);
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uint32_t nand_getbuswidth(DeviceState *dev);
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#define NAND_MFR_TOSHIBA 0x98
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#define NAND_MFR_SAMSUNG 0xec
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#define NAND_MFR_FUJITSU 0x04
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#define NAND_MFR_NATIONAL 0x8f
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#define NAND_MFR_RENESAS 0x07
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#define NAND_MFR_STMICRO 0x20
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#define NAND_MFR_HYNIX 0xad
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#define NAND_MFR_MICRON 0x2c
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/* onenand.c */
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void *onenand_raw_otp(DeviceState *onenand_device);
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/* ecc.c */
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typedef struct {
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uint8_t cp; /* Column parity */
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uint16_t lp[2]; /* Line parity */
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uint16_t count;
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} ECCState;
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uint8_t ecc_digest(ECCState *s, uint8_t sample);
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void ecc_reset(ECCState *s);
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extern VMStateDescription vmstate_ecc_state;
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#endif
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