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ec150c7e09
Back in 2016, we discussed[1] rules for headers, and these were
generally liked:
1. Have a carefully curated header that's included everywhere first. We
got that already thanks to Peter: osdep.h.
2. Headers should normally include everything they need beyond osdep.h.
If exceptions are needed for some reason, they must be documented in
the header. If all that's needed from a header is typedefs, put
those into qemu/typedefs.h instead of including the header.
3. Cyclic inclusion is forbidden.
This patch gets include/ closer to obeying 2.
It's actually extracted from my "[RFC] Baby steps towards saner
headers" series[2], which demonstrates a possible path towards
checking 2 automatically. It passes the RFC test there.
[1] Message-ID: <87h9g8j57d.fsf@blackfin.pond.sub.org>
https://lists.nongnu.org/archive/html/qemu-devel/2016-03/msg03345.html
[2] Message-Id: <20190711122827.18970-1-armbru@redhat.com>
https://lists.nongnu.org/archive/html/qemu-devel/2019-07/msg02715.html
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20190812052359.30071-2-armbru@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
84 lines
1.9 KiB
C
84 lines
1.9 KiB
C
/*
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* QEMU ICH9 TCO emulation
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*
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* Copyright (c) 2015 Paulo Alcantara <pcacjr@zytor.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#ifndef HW_ACPI_TCO_H
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#define HW_ACPI_TCO_H
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#include "exec/memory.h"
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#include "migration/vmstate.h"
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/* As per ICH9 spec, the internal timer has an error of ~0.6s on every tick */
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#define TCO_TICK_NSEC 600000000LL
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/* TCO I/O register offsets */
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enum {
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TCO_RLD = 0x00,
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TCO_DAT_IN = 0x02,
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TCO_DAT_OUT = 0x03,
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TCO1_STS = 0x04,
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TCO2_STS = 0x06,
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TCO1_CNT = 0x08,
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TCO2_CNT = 0x0a,
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TCO_MESSAGE1 = 0x0c,
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TCO_MESSAGE2 = 0x0d,
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TCO_WDCNT = 0x0e,
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SW_IRQ_GEN = 0x10,
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TCO_TMR = 0x12,
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};
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/* TCO I/O register control/status bits */
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enum {
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SW_TCO_SMI = 1 << 1,
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TCO_INT_STS = 1 << 2,
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TCO_LOCK = 1 << 12,
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TCO_TMR_HLT = 1 << 11,
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TCO_TIMEOUT = 1 << 3,
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TCO_SECOND_TO_STS = 1 << 1,
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TCO_BOOT_STS = 1 << 2,
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};
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/* TCO I/O registers mask bits */
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enum {
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TCO_RLD_MASK = 0x3ff,
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TCO1_STS_MASK = 0xe870,
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TCO2_STS_MASK = 0xfff8,
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TCO1_CNT_MASK = 0xfeff,
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TCO_TMR_MASK = 0x3ff,
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};
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typedef struct TCOIORegs {
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struct {
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uint16_t rld;
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uint8_t din;
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uint8_t dout;
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uint16_t sts1;
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uint16_t sts2;
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uint16_t cnt1;
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uint16_t cnt2;
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uint8_t msg1;
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uint8_t msg2;
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uint8_t wdcnt;
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uint16_t tmr;
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} tco;
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uint8_t sw_irq_gen;
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QEMUTimer *tco_timer;
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int64_t expire_time;
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uint8_t timeouts_no;
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MemoryRegion io;
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} TCOIORegs;
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/* tco.c */
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void acpi_pm_tco_init(TCOIORegs *tr, MemoryRegion *parent);
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extern const VMStateDescription vmstate_tco_io_sts;
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#endif /* HW_ACPI_TCO_H */
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