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9746e583fe
The RISC-V AIA (Advanced Interrupt Architecture) defines a new interrupt controller for MSIs (message signal interrupts) called IMSIC (Incoming Message Signal Interrupt Controller). The IMSIC is per-HART device and also suppport virtualizaiton of MSIs using dedicated VS-level guest interrupt files. This patch adds device emulation for RISC-V AIA IMSIC which supports M-level, S-level, and VS-level MSIs. Signed-off-by: Anup Patel <anup.patel@wdc.com> Signed-off-by: Anup Patel <anup@brainfault.org> Reviewed-by: Frank Chang <frank.chang@sifive.com> Message-Id: <20220220085526.808674-3-anup@brainfault.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| .. | ||
| allwinner-a10-pic.h | ||
| arm_gic_common.h | ||
| arm_gic.h | ||
| arm_gicv3_common.h | ||
| arm_gicv3_its_common.h | ||
| arm_gicv3.h | ||
| armv7m_nvic.h | ||
| aspeed_vic.h | ||
| bcm2835_ic.h | ||
| bcm2836_control.h | ||
| goldfish_pic.h | ||
| heathrow_pic.h | ||
| i8259.h | ||
| imx_avic.h | ||
| imx_gpcv2.h | ||
| intc.h | ||
| loongson_liointc.h | ||
| m68k_irqc.h | ||
| mips_gic.h | ||
| ppc-uic.h | ||
| realview_gic.h | ||
| riscv_aclint.h | ||
| riscv_aplic.h | ||
| riscv_imsic.h | ||
| rx_icu.h | ||
| sifive_plic.h | ||
| xlnx-pmu-iomod-intc.h | ||
| xlnx-zynqmp-ipi.h | ||