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Configure the size of the RAM of the SOC using a property to propagate the value down to the memory controller from the board level. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 1473438177-26079-14-git-send-email-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
34 lines
706 B
C
34 lines
706 B
C
/*
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* ASPEED SDRAM Memory Controller
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*
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* Copyright (C) 2016 IBM Corp.
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*
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* This code is licensed under the GPL version 2 or later. See the
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* COPYING file in the top-level directory.
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*/
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#ifndef ASPEED_SDMC_H
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#define ASPEED_SDMC_H
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#include "hw/sysbus.h"
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#define TYPE_ASPEED_SDMC "aspeed.sdmc"
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#define ASPEED_SDMC(obj) OBJECT_CHECK(AspeedSDMCState, (obj), TYPE_ASPEED_SDMC)
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#define ASPEED_SDMC_NR_REGS (0x8 >> 2)
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typedef struct AspeedSDMCState {
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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MemoryRegion iomem;
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uint32_t regs[ASPEED_SDMC_NR_REGS];
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uint32_t silicon_rev;
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uint32_t ram_bits;
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uint64_t ram_size;
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} AspeedSDMCState;
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#endif /* ASPEED_SDMC_H */
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